Post-Silicon ECO Automation for IC Design Changes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing post-silicon engineering change order (PSECO) process is costly and time-consuming due to the need for manual editing of gate level netlists and the potential for logic errors, especially when dealing with large-scale changes, as it requires re-routing nets and selecting spare cell instances to modify IC designs without automating the synthesis and placement processes effectively.
Innovation Solution
A method that automates the process of implementing engineering changes by comparing netlists to identify additions and deletions, performing ECO resynthesis to select spare cell instances, optimizing net routing, and modifying the layout to minimize metal layer changes, while avoiding user-specified frozen layers and iteratively refining the routing to achieve a routable solution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If manual editing of gate level netlists is used to implement PSECO, then flexibility in modifying IC design is improved, but engineering effort and time consumption increase significantly
Solution Approach 1:
The system performs self-service by automatically comparing netlists, identifying additions and deletions, selecting spare cell instances, and routing nets without requiring manual editing. The computer executes instructions to autonomously complete the PSECO process, eliminating the need for engineers to manually edit gate level netlists while maintaining design flexibility.
Solution Approach 2:
The manual mechanical process of editing netlists is replaced by an automated computer-based system. The computer compares netlists, identifies changes, selects spare cells, and routes nets algorithmically, substituting the manual mechanical editing process with an automated computational system that reduces time consumption while preserving design adaptability.
2Ease of operation
If manual selection of spare cell instances and net routing is performed, then control over design changes is improved, but risk of logic errors increases
Solution Approach 1:
The system incorporates feedback by automatically verifying the logical equivalence between the original IC design and the modified design after implementing PSECO. The computer compares the netlists and validates that the changes maintain functional equivalence, providing feedback to ensure correctness and reduce logic errors while maintaining operational control.
Solution Approach 2:
The system performs self-validation by automatically checking for logic errors and verifying design equivalence without requiring manual verification. The computer autonomously validates the PSECO changes, reducing the risk of logic errors while maintaining control over the design modification process.
3Reliability
If entire design process is repeated for IC modifications, then design correctness is improved, but manufacturing cost increases due to redoing all masks
Solution Approach 1:
The system extracts and modifies only the necessary portions of the IC design by identifying specific additions and deletions in the netlist, selecting only the required spare cell instances, and routing only the affected nets. This extraction approach allows design correctness to be verified while avoiding the need to redo all masks, thereby reducing manufacturing cost.
Solution Approach 2:
Instead of performing the entire design process again, the system performs partial action by implementing only the necessary modifications through automated PSECO. The computer executes instructions to make targeted changes to the IC design without repeating the complete design flow, reducing manufacturing cost while ensuring design correctness through automated validation.
4Ease of manufacture
If automated PSECO system modifies only metal layers, then mask reuse is improved, but routing complexity increases
Solution Approach 1:
The system performs self-service by automatically handling the increased routing complexity through algorithmic net routing. The computer executes instructions to route nets between selected spare cell instances, automatically resolving routing challenges without manual intervention. This enables mask reuse while managing routing complexity through automated computation.
Solution Approach 2:
The manual mechanical process of handling routing complexity is replaced by an automated computer-based routing algorithm. The computer autonomously routes nets through the metal layers, substituting manual routing efforts with automated computational methods that manage complexity while enabling mask reuse for cost reduction.
Data Source
AI summary
An engineering change order (ECO) modifying an IC having spare cell instances is implemented by converting active cell instances implementing portions of the IC to be deleted into additional spare cell instances, by creating a technology independent behavioral model of portions of the IC to be added, by selecting spare cell instances to implement the behavior model, and by routing nets to the selected spare cell instances in a way that minimizes a number of metal layers of the IC that are modified.