Posted Interrupt Architecture for Virtualized Systems

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Solution Overview

Problem

As computing systems become more complex, existing interconnect architectures face challenges in efficiently managing bandwidth and power consumption, particularly in virtualized environments where overhead from virtualization layers can lead to reduced performance and increased latency in interrupt handling.

Innovation Solution

The implementation of a posted interrupt descriptor cache and a finite state machine (FSM) within the root complex to handle interrupts independently, bypassing the virtual machine manager (VMM) and ensuring compliance with interconnect ordering rules, thereby optimizing interrupt delivery and reducing latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional interrupt handling through VMM is used, then virtualization policies can be implemented, but interrupt latency increases and handling efficiency decreases

Engineering Contradiction:

Improvevirtualization policy implementationVSAvoidinterrupt latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts the interrupt handling function from the VMM software layer and relocates it to a dedicated hardware interrupt handling unit. This extraction eliminates the need for VM exits during interrupt processing, directly reducing interrupt latency while maintaining virtualization policy enforcement through the hardware unit's ability to consult virtualization data structures.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a hardware interrupt handling unit as an intermediary between the I/O device and the virtualized environment. This intermediary directly receives and processes interrupts from I/O devices, consulting virtualization data structures to determine appropriate virtual machine destinations, thereby avoiding VMM software intervention and reducing latency.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If multiple virtual machines share physical resources, then resource utilization improves, but interrupt handling overhead increases

Engineering Contradiction:

Improveresource utilizationVSAvoidinterrupt handling overhead

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The hardware interrupt handling unit performs self-service by directly managing interrupt routing and processing without requiring VMM software intervention. It autonomously consults virtualization data structures to determine interrupt destinations and processes interrupts, eliminating the overhead of software-based interrupt handling in virtualized environments.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The patent segments the interrupt handling function into a dedicated hardware unit separate from the general-purpose VMM software. This segmentation allows interrupt processing to be handled independently and efficiently, reducing overhead while maintaining the ability to manage multiple virtual machines through the hardware unit's interaction with virtualization data structures.

Inventive Principle:

Principle #1Segmentation

3Adaptability or versatility

If interrupt handling goes through software layers, then flexibility in policy implementation is maintained, but processing speed decreases

Engineering Contradiction:

Improvepolicy implementation flexibilityVSAvoidinterrupt processing speed

Core Design Contradiction:

Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent replaces the software-based interrupt handling mechanism with a hardware-based implementation. The hardware interrupt handling unit directly processes interrupts and consults virtualization data structures, substituting the slower software execution path with faster hardware logic while maintaining policy flexibility through programmable data structures.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent prepares virtualization data structures in advance that encode policy information and interrupt routing decisions. The hardware interrupt handling unit uses these pre-prepared structures to make rapid routing decisions without requiring real-time software policy evaluation, thus maintaining flexibility while increasing processing speed.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS9952987B2Posted interrupt architecture

Publication Date: 2018.04.24 INTEL CORP

AI summary

An interrupt is identified from an input/output (I/O) device and an address of a particular cache line is identified associated with the interrupt. The cache line corresponds to a destination of the interrupt and represents one or more attributes of the interrupt. A request is sent to a coherency agent to acquire ownership of the particular cache line and a request is sent to perform a read-modify-write (RMW) operation on the cache line based on the interrupt.