Nonvolatile Memory Decoding with Posterior-Based LLR Table Updates

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Solution Overview

Problem

Current memory systems face challenges in accurately decoding data from nonvolatile memory due to mismatches between assumed and actual channel conditions, leading to decoding failures, especially when pre-prepared LLR tables are not available for all channels.

Innovation Solution

The memory system includes a converting unit that converts received values into likelihood information using a conversion table, and a decoder that decodes this information. In case of decoding failure, a generation unit creates a new conversion table based on the decoding result, allowing the system to adapt and improve decoding accuracy by iteratively estimating the channel conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If pre-prepared LLR tables are used for decoding, then decoding speed is improved, but decoding accuracy deteriorates when channel conditions mismatch the assumed conditions

Engineering Contradiction:
Improvedecoding speedVSAvoiddecoding accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The system pre-prepares multiple LLR tables corresponding to different assumed channel conditions before actual decoding operations. When decoding is needed, the appropriate pre-prepared table is selected based on the actual channel conditions, avoiding real-time table generation while maintaining accuracy.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system changes the parameter of LLR tables by preparing multiple versions with different characteristics (corresponding to different channel conditions). This allows selection of the most appropriate table for the current channel state, resolving the contradiction between speed and accuracy.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If multiple LLR tables are prepared for different channel conditions, then decoding accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvedecoding accuracyVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The LLR table generation unit can generate LLR tables for multiple different channel conditions using the same generation logic. This multi-functional capability allows a single unit to handle various channel types without requiring separate dedicated tables for each condition, reducing overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If LLR tables are generated in real-time based on actual channel conditions, then decoding accuracy is improved, but processing time increases

Engineering Contradiction:
Improvedecoding accuracyVSAvoidtable generation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system pre-generates multiple LLR tables for different channel conditions before actual decoding operations occur. This preliminary preparation eliminates real-time table generation overhead during decoding, maintaining high accuracy while avoiding time loss.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11163639B2Memory system and method for controlling nonvolatile memory
Publication Date: 2021.11.02 KIOXIA CORP
  • US11163639B2 patent drawing
  • US11163639B2 patent drawing
  • US11163639B2 patent drawing

AI summary

A memory system according to an embodiment includes a nonvolatile memory and a memory controller. The memory controller converts a received value read from the nonvolatile memory into first likelihood information by using a first conversion table, executes decoding on the first likelihood information and outputting a posterior value, outputs an estimated value of the received value obtained on the basis of the posterior value in a case where the decoding is successful. The memory controller generates a second conversion table on the basis of the posterior value in a case where the decoding fails. The memory controller converts the received value into second likelihood information by using the second conversion table in a case where the second conversion table has been generated, and executes decoding on the second likelihood information and outputs a posterior value.