Proof-of-Work Chip DAG Data Management
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Solution Overview
Problem
The service life of chips used in Proof of Work (PoW) algorithms is shortened due to increasing data sizes of Cache and Direct Acyclic Graph (DAG) files, leading to calculation errors and incomplete data access, which limits their operational capacity.
Innovation Solution
The chip design includes a central control unit, a storage unit, and a calculating unit configured to receive and process DAG data, with a DAG generation mode selection unit that allows external DAG data processing, enabling the chip to store only DAG data without generating Cache data, thus extending its service life by managing storage capacity effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the chip generates and stores both Cache data and DAG data internally, then the proof of work calculation can be performed completely on-chip, but the storage capacity is exceeded when combined Cache and DAG data exceeds internal storage, leading to calculation errors and shortened service life
Solution Approach 1:
The patent divides the data processing into two segments: Cache data generation remains on-chip for speed, while DAG data generation is moved to external devices for storage capacity. The chip receives pre-generated DAG data from external sources through the external bus interface, separating the functions to resolve the storage capacity limitation.
Solution Approach 2:
The patent extracts the DAG data generation function from the chip and moves it to external devices. The chip no longer needs to generate DAG data internally, but instead receives it from external sources, thereby reducing the storage burden on the chip's internal memory while maintaining calculation accuracy.
2Productivity
If the chip processes larger DAG files to maintain operation with increasing blockchain data, then the processing capability is improved, but the service life of the chip is shortened due to storage capacity limitations and calculation errors
Solution Approach 1:
The patent makes the chip's data processing dynamic by allowing flexible configuration of DAG data sources. The chip can adapt to different operating modes: using internal generated DAG data when storage permits, or switching to externally provided DAG data when storage capacity is exceeded, thereby extending operational lifespan.
Solution Approach 2:
The patent introduces an external device as an intermediary for DAG data provision. This external intermediary handles the generation and provision of large DAG files, allowing the chip to maintain high processing capability without being constrained by its internal storage capacity, thus extending service life.
3Speed
If the chip uses internal storage for both Cache and DAG data, then the data access speed is fast, but the chip cannot handle increasing DAG file sizes without producing calculation errors
Solution Approach 1:
The patent segments the data handling functions: Cache data remains on-chip for high-speed access, while DAG data is handled externally for adaptability to large file sizes. The external bus interface enables the chip to receive DAG data from external sources, maintaining fast access to Cache data while gaining the ability to handle increasing blockchain data sizes.
Data Source
AI summary
A proof-of-work operation method, a proof-of-work chip, and an upper computer. The proof-of-work chip comprises: a central control unit, which is configured to receive DAG data sent by an upper computer, an external DAG processing unit, which is configured to store the DAG data in a storage unit; the storage unit, which is configured to store the DAG data; and a calculation unit, which is configured to perform a proof-of-work operation according to the stored DAG data.