Power Amplifier Bias Circuit for Medium-Power Efficiency

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Solution Overview

Problem

Existing power amplifier circuits experience a decrease in power-added efficiency when operating at medium output power levels compared to high output power levels.

Innovation Solution

The power amplifier circuit includes a first transistor, a second transistor, a third transistor, and multiple bias and current limiting circuits, with specific resistor configurations to manage bias currents and collector currents, thereby optimizing power-added efficiency across different output power levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single current limiting circuit is used to limit the DC bias current in response to power supply voltage changes, then the circuit complexity is reduced, but the power-added efficiency decreases at medium output power levels

Engineering Contradiction:
Improvecircuit complexityVSAvoidpower-added efficiency
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The current limiting function is segmented into two independent circuits: a first current limiting circuit for the first amplifying transistor and a second current limiting circuit for the second amplifying transistor. Each circuit independently limits the respective DC bias current based on the power supply voltage, allowing optimized efficiency across different output power levels without increasing overall system complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different current limiting characteristics are applied locally to each amplifying transistor stage. The first current limiting circuit is optimized for the drive stage while the second current limiting circuit is optimized for the power stage, allowing each stage to operate at optimal efficiency points regardless of the other stage's operating conditions.

Inventive Principle:
Principle #3Local quality

2Loss of energy

If the DC bias current is reduced to improve efficiency at high output power, then the power consumption decreases, but the linearity and signal quality deteriorate

Engineering Contradiction:
Improvepower consumptionVSAvoidsignal quality
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The DC bias currents for both amplifying transistors are dynamically adjusted based on the instantaneous power supply voltage through their respective current limiting circuits. This dynamic control allows the system to maintain optimal linearity and signal quality at each operating point while adapting to varying output power requirements, preventing the signal quality deterioration that would occur with static current reduction.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12273079B2Power amplifier circuit, high frequency circuit, and communication apparatus
Publication Date: 2025.04.08 MURATA MFG CO LTD
  • US12273079B2 patent drawing
  • US12273079B2 patent drawing
  • US12273079B2 patent drawing

AI summary

Increase in power-added efficiency can be achieved. A second base of a second transistor is connected to a first collector of a first transistor. A third base of a third transistor is connected to the first collector of the first transistor, and a third collector of the third transistor is connected to a second collector of the second transistor. A second bias circuit includes a fifth transistor connected to the second base of the second transistor. A third bias circuit includes a sixth transistor connected to the third base of the third transistor. A first current limiting circuit includes a seventh transistor, a first collector resistor, and a first base resistor. A second current limiting circuit includes an eighth transistor, a second collector resistor, and a second base resistor.