Power Amplifier Bias Control for FET Envelope Tracking
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Solution Overview
Problem
Existing power amplifying circuits face challenges in balancing efficiency improvement and damage suppression, particularly in FET amplifiers due to low breakdown voltages and difficulties in applying envelope tracking techniques at high frequency bands.
Innovation Solution
A power amplifying circuit design that includes a first amplifier with a field effect transistor and a second amplifier with a bipolar transistor, utilizing a control part to regulate a power supply voltage for the first amplifier and an envelope tracking voltage for the second amplifier, with a regulator controlling the first power supply voltage based on signal input.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If envelope tracking technique is applied to FET amplifier to improve power efficiency, then power efficiency is improved, but terminal voltage may exceed breakdown voltage causing FET damage
Solution Approach 1:
The patent applies dynamics by making the power supply voltage to the FET amplifier variable through envelope tracking, while simultaneously making the bias voltage dynamically adjustable to follow the power supply voltage variations. This dynamic adjustment of bias voltage ensures that the voltage across FET terminals remains within breakdown limits even when power supply voltage changes rapidly at high frequencies (100 MHz or higher).
Solution Approach 2:
The patent changes the bias voltage parameter in response to power supply voltage changes. By adjusting the bias voltage to track the envelope of the power supply voltage, the system maintains optimal FET operation point while preventing terminal voltage from exceeding breakdown voltage, thus resolving the contradiction between efficiency improvement and damage suppression.
2Productivity
If power supply voltage varies at high band (100 MHz or higher) for envelope tracking, then power efficiency is improved, but bias voltage cannot follow power supply voltage causing terminal voltage to exceed breakdown voltage
Solution Approach 1:
The patent introduces an intermediary mechanism (bias voltage control circuit) that mediates between the rapidly varying power supply voltage and the FET bias requirements. This intermediary bias voltage adjustment system translates the envelope information into appropriate bias voltage changes, enabling the FET to operate efficiently without exceeding breakdown voltage even at high frequency variations.
3Reliability
If FET amplifier operates at low breakdown voltage to prevent damage, then reliability is improved, but power efficiency cannot be maximized through envelope tracking
Solution Approach 1:
The patent makes the bias voltage control system multi-functional: it simultaneously serves to (1) maintain FET operation within safe voltage limits to prevent damage, and (2) enable envelope tracking for power efficiency improvement. This universal bias control mechanism resolves the contradiction by achieving both reliability and energy efficiency through a single integrated approach.
Data Source
AI summary
A power amplifying circuit includes: a first amplifier that includes a field effect transistor as an amplifying element, amplifies a first radio frequency signal, and outputs a second radio frequency signal; a second amplifier that includes a bipolar transistor as an amplifying element, amplifies the second radio frequency signal, and outputs a third radio frequency signal; a control part that outputs a control signal, the control signal controlling a first power supply voltage to be supplied to the first amplifier; and a regulator that outputs the first power supply voltage to the first amplifier, the first power supply voltage being a voltage that depends on the control signal. A second power supply voltage to be supplied to the second amplifier is an envelope tracking voltage.


