Power Amplifier Bias Circuit for High-Output PAE

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Solution Overview

Problem

As output level increases, the current flowing from the bias circuit into the base of the amplification transistor in existing power amplifiers decreases power added efficiency (PAE), particularly at high output power.

Innovation Solution

The power amplifier configuration includes a first transistor for amplifying the input signal, a second transistor with power-supply voltage applied to its collector to supply bias voltage or current to the base of the first transistor, and a third transistor with a diode-connected fourth transistor to manage bias current, reducing excess current and maintaining base voltage at high output power.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a bias circuit supplies bias current to the base of the amplification transistor, then the transistor can operate properly, but as output level increases the bias current increases causing decreased power added efficiency

Engineering Contradiction:
Improveproper operation of amplification transistorVSAvoidpower added efficiency
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The bias supply function is segmented into multiple independent bias circuits (first bias circuit for first transistor, second bias circuit for third transistor) rather than using a single shared bias circuit. This allows each transistor to receive optimized bias current independently, reducing total bias current consumption while maintaining proper operation of each amplification stage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each bias circuit is designed with local characteristics tailored to its specific transistor's requirements. The first bias circuit includes a first resistor connected to the base of the first transistor, while the second bias circuit includes a second resistor connected to the base of the third transistor. This localized biasing optimizes performance for each transistor's specific operating conditions, reducing overall power consumption.

Inventive Principle:
Principle #3Local quality

2Power

If multiple transistors are used to amplify the input signal, then the amplification capability increases, but the device complexity increases

Engineering Contradiction:
Improveamplification capabilityVSAvoidnumber of transistors and bias circuits
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The first and third transistors are connected in parallel between the same power supply voltage and ground, with their collectors connected together and emitters connected to ground. This parallel configuration combines their amplification capabilities while sharing common power supply connections and ground references, reducing overall circuit complexity compared to cascaded configurations.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Each bias circuit serves multiple functions: it provides bias current to its associated transistor, establishes the operating point, and regulates base voltage. The first bias circuit supplies bias to the first transistor while the second bias circuit supplies bias to the third transistor, with both circuits using similar structures (transistor plus resistor) to achieve multiple objectives simultaneously.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10236828B2Power amplifier
Publication Date: 2019.03.19 MURATA MFG CO LTD
  • US10236828B2 patent drawing
  • US10236828B2 patent drawing
  • US10236828B2 patent drawing

AI summary

A power amplifier has improved power added efficiency at high output power. The power amplifier includes: a first transistor for amplifying an input signal input to the base thereof and outputting the amplified signal from the collector thereof; a second transistor with power-supply voltage applied to the collector thereof to supply bias voltage or bias current from the emitter thereof to the base of the first transistor; a third transistor whose collector is connected to the collector of the first transistor to amplify the input signal input to the base thereof and output the amplified signal from a collector thereof; a fourth transistor whose base and collector are connected to supply bias from the emitter thereof to the base of the third transistor; and a first resistor with bias control voltage applied to one end thereof and the other end connected to the bases of the second and fourth transistors.