Power Amplifier Module Vertical Heat Dissipation via Emitter Bump
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Solution Overview
Problem
The existing power amplifier modules face challenges in efficiently dissipating heat from transistors due to restricted sectional areas of heat-dissipation paths, leading to increased thermal resistance and reduced performance as temperature increases.
Innovation Solution
The power amplifier module incorporates a substrate with an active region and insulating element isolation region, featuring a collector, base, and emitter layer stack, along with interlayer insulating films and pads thermally coupled to the substrate, allowing for increased sectional areas of heat-dissipation paths through emitter and collector bumps, thereby enhancing heat dissipation efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If heat is dissipated through thermal paths from transistors through bumps to the printed circuit board, then heat dissipation is achieved, but the sectional area of heat-dissipation paths is restricted by the areas of emitter, base, and collector, leading to high thermal resistance
Solution Approach 1:
The patent transitions from lateral heat dissipation in the substrate plane to vertical heat dissipation through the thickness direction. By stacking the emitter, base, and collector layers vertically and positioning bump electrodes above them, the heat-dissipation paths extend in the thickness direction rather than laterally. This dimensional change allows the sectional areas of heat-dissipation paths to be determined by the bump electrode areas rather than being restricted by the smaller emitter/base/collector areas, thereby increasing the effective heat-dissipation area and reducing thermal resistance.
2Length of stationary object
If the emitter layer, emitter electrode, emitter wiring line, emitter main electrode terminal, and bump electrode are stacked in the thickness direction, then the heat-dissipation path is shortened, but the sectional area of the heat-dissipation path cannot be larger than the area of the emitter electrode
Solution Approach 1:
The patent resolves this contradiction by changing the spatial arrangement from lateral expansion to vertical stacking. The emitter electrode, emitter wiring line, emitter main electrode terminal, and bump electrode are arranged in the thickness direction, creating a vertical heat-dissipation path. This allows the heat-dissipation path to be short in length while the bump electrode at the top can have a larger area than the emitter electrode below it, effectively decoupling the path length from the sectional area constraint.
Solution Approach 2:
The patent employs a nested structure where the emitter electrode is positioned below the bump electrode, with intermediate wiring layers and insulating films in between. This nested arrangement in the thickness direction allows smaller components to be contained within the vertical projection of larger components, enabling the upper bump electrode to have a larger area than the lower emitter electrode while maintaining a compact vertical profile.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces thermal resistance and enhances heat-dissipation efficiency by increasing the sectional area of heat-dissipation paths, improving the module's performance by effectively managing heat generated from the heat-generating sources.
Implementation Method 1
a pad thermally coupled to the element isolation region
Data Source
AI summary
A power amplifier module includes a substrate including, in an upper surface of the substrate, an active region and an element isolation region. The power amplifier module further includes a collector layer, a base layer, and an emitter layer that are stacked on the active region; an interlayer insulating film that covers the collector layer, the base layer, and the emitter layer; a pad that is thermally coupled to the element isolation region; and an emitter bump that is disposed on the interlayer insulating film, electrically connected to the emitter layer through a via hole provided in the interlayer insulating film, and electrically connected to the pad. In plan view, the emitter bump partially overlaps an emitter region which is a region of the emitter layer and through which an emitter current flows.


