Multi-Stage Power Amplifier Impedance Tuning for Noise Reduction

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Solution Overview

Problem

Power amplifiers in mobile communication devices face challenges in reducing receive-band noise, particularly thermal noise in bias circuits, which affects signal amplification and requires further noise reduction to meet strict GSM communication standards.

Innovation Solution

The power amplifier design incorporates multiple stages with impedance circuits between transistors and a reference potential, where the impedance can be frequency-dependent or independent, stabilizing the load impedance and reducing noise by minimizing conversion gain variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If power amplification circuits are used in mobile communication devices, then signal amplification is achieved, but receive-band noise increases

Engineering Contradiction:
Improvesignal amplificationVSAvoidreceive-band noise
Core Design Contradiction:
PowerVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by making the impedance circuits in different stages have different characteristics. The first impedance circuit has a first impedance value while the second impedance circuit has a second impedance value that is different from the first. This localized differentiation allows each stage to be optimized for its specific function - the first stage for signal amplification and the second stage for noise reduction - thereby resolving the contradiction between achieving signal amplification and reducing receive-band noise.

Inventive Principle:
Principle #3Local quality

2Object-generated harmful factors

If impedance circuits with frequency-dependent impedance are used, then noise reduction is improved, but device complexity increases

Engineering Contradiction:
Improvenoise figureVSAvoidcircuit complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent employs parameter changes by configuring impedance circuits with specific impedance values that may vary with frequency. The first impedance circuit has a first impedance value and the second impedance circuit has a second impedance value, where these impedance values can be frequency-dependent. This allows the circuits to optimize noise performance across different operating frequencies without requiring completely different circuit topologies, thereby achieving noise reduction while controlling complexity through parameter optimization rather than structural complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11444585B2Power amplifier
Publication Date: 2022.09.13 MURATA MFG CO LTD
  • US11444585B2 patent drawing
  • US11444585B2 patent drawing
  • US11444585B2 patent drawing

AI summary

A power amplifier includes power amplification circuits in a plurality of stages including a first stage and a second stage, each power amplification circuit including a transistor. The power amplification circuit in the first stage includes a first impedance circuit between an emitter of the transistor and a reference potential. The first impedance circuit has an impedance that does not vary with frequency or an impedance that varies with frequency. The power amplification circuit in the second stage includes a second impedance circuit between an emitter of the transistor and a reference potential. The second impedance circuit has an impedance that does not vary with frequency or an impedance that varies with frequency.