Multi-Stage Power Amplifier Circuit for Mixed-Frequency Gain
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Solution Overview
Problem
Existing power amplification circuits in mobile communication devices experience a reduction in amplification rate due to frequency, particularly when handling signals with different high and low frequency bands.
Innovation Solution
A power amplification circuit design that includes separate wiring for signals with different frequencies, with a first amplification circuit amplifying high-frequency signals and a second amplification circuit amplifying low-frequency signals, thereby minimizing the impact of frequency on amplification rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a large size FET is used to connect the high frequency power amplifier to the common signal path, then the amplifier can handle high frequency signals, but the parasitic capacitance increases and the amplification rate of high frequency RF signals is reduced
Solution Approach 1:
The patent divides the amplifier into multiple stages: a drive stage amplifier and a power amplifier stage. The drive stage uses a small size FET to connect to the common signal path, while the power amplifier stage uses a large size FET isolated from the common path. This segmentation allows each stage to be optimized for its specific function without the compromise of using a large FET in the signal path connection.
Solution Approach 2:
The patent introduces an intermediate drive stage amplifier between the common signal path and the high frequency power amplifier. This drive stage acts as a mediator that buffers the signal, allowing the large size FET in the power amplifier stage to be used without directly connecting to the common path, thereby avoiding the parasitic capacitance issue while still achieving high frequency amplification.
2Device complexity
If a common signal path is used for both high frequency and low frequency amplifiers, then the circuit structure is simplified, but the amplification rate of high frequency signals is reduced due to the large size FET required for high frequency operation
Solution Approach 1:
The patent segments the signal path into a common path up to the drive stage, and then separate paths for high frequency and low frequency power amplifiers. This allows the common path to use a small size FET for good high frequency performance, while the high frequency power amplifier can use a large size FET in its dedicated path to provide sufficient power without degrading the common path performance.
3Reliability
If a small size FET is used to connect the low frequency power amplifier to the common signal path, then the parasitic capacitance is reduced, but the power handling capability for high frequency signals is insufficient
Solution Approach 1:
The patent uses a two-stage architecture where the drive stage amplifier with small size FET handles the common signal path and provides good high frequency performance, while the power amplifier stage with large size FET provides the necessary power handling capability. The segmentation allows each component to be optimized for its specific role without compromise.
Data Source
AI summary
A power amplification circuit includes first wiring supplied with a first signal having a first frequency, second wiring supplied with a second signal having a second frequency that differs from the first frequency, a first amplification circuit that amplifies the first signal supplied through the first wiring and supplies a first amplified signal to the second wiring, and a second amplification circuit that amplifies the signal supplied through the second wiring and outputs a second amplified signal.