Power-Aware Network Packet Scheduling for Latency and Throughput
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current network traffic processing systems lack efficient prioritization and resource allocation, leading to suboptimal throughput and latency for high-priority traffic, such as real-time communications and processor-bound operations.
Innovation Solution
A computing device implements power-aware scheduling by classifying network packets based on priority and performance criteria, assigning them to appropriate processing engines with optimized performance scaling, ensuring high-priority traffic is processed with the fastest path and lowest latency, utilizing heterogeneous processor cores and hardware accelerators.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If network traffic is processed using traditional scheduling algorithms (strict priority or weighted round robin), then all traffic types can be handled, but throughput and latency for high-priority traffic are suboptimal
Solution Approach 1:
The system dynamically adjusts processing engine performance scaling based on real-time workload conditions and traffic priority levels. Processing engines can scale their performance to match the actual demand, allowing high-priority traffic to receive enhanced processing resources when needed, thereby improving both throughput and reducing latency for critical traffic types.
Solution Approach 2:
The patent applies differentiated processing quality to different traffic types by routing high-priority traffic to processing engines with higher performance scaling, while lower-priority traffic can be handled by engines with reduced scaling. This local quality differentiation ensures that critical traffic receives the necessary processing power without requiring all engines to operate at maximum capacity continuously.
2Productivity
If processing engines operate at high performance scaling, then throughput for high-priority traffic improves, but power consumption increases
Solution Approach 1:
The system implements dynamic performance scaling where processing engines adjust their operational performance based on the actual workload and priority of incoming traffic. When high-priority traffic arrives, engines scale up to provide high throughput; when traffic load decreases or consists of lower-priority packets, engines scale down to reduce power consumption, thus dynamically balancing performance and energy efficiency.
Solution Approach 2:
The patent changes the performance parameter of processing engines based on traffic conditions. By adjusting the performance scaling parameter dynamically, the system can operate processing engines at different efficiency points, selecting higher performance levels only when necessary for high-priority traffic, thereby reducing overall power consumption while maintaining required throughput for critical applications.
3Productivity
If heterogeneous processor cores are used, then resource allocation efficiency improves, but device complexity increases
Solution Approach 1:
The system segments processing engines into different types based on their performance characteristics and suitability for specific traffic types. By dividing the processing workload across heterogeneous cores with different capabilities, the system can allocate appropriate resources to different traffic priorities, improving overall resource allocation efficiency despite the increased architectural complexity.
Solution Approach 2:
The heterogeneous processing engines are designed to handle multiple traffic types and priorities through a unified scheduling framework. The power-aware scheduler provides a universal control mechanism that can direct any traffic type to appropriate processing engines based on current conditions, making the complex heterogeneous architecture manageable and effective through a single multi-functional scheduling system.
Data Source
AI summary
Technologies for power-aware scheduling include a computing device that receives network packets. The computing device classifies the network packets by priority level and then assigns each network packet to a performance group bin. The packets are assigned based on priority level and other performance criteria. The computing device schedules the network packets assigned to each performance group for processing by a processing engine such as a processor core. Network packets assigned to performance groups having a high priority level are scheduled for processing by processing engines with a high performance level. The computing device may select performance levels for processing engines based on processing workload of the network packets. The computing device may control the performance level of the processing engines, for example by controlling the frequency of processor cores. The processing workload may include packet encryption. Other embodiments are described and claimed.