Power Button Override for Persistent Memory Data Integrity

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Solution Overview

Problem

Persistent memory enabled computer systems face data loss and file system corruption risks during ungraceful shutdowns, particularly when the power button is pressed to force a shutdown, as existing mechanisms bypass data integrity checks, leading to potential loss of significant user data and file system corruption.

Innovation Solution

Implementing a power button override mechanism where the System on a Chip (SoC) hardware monitors the power button press and initiates a flush of data from the CPU cache and volatile memory to persistent memory before shutdown, ensuring data durability without delaying the shutdown process or altering the user experience.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the power button is pressed to force shutdown in a persistent memory system, then the shutdown speed is improved, but data loss and file system corruption occur

Engineering Contradiction:
Improveshutdown speedVSAvoiddata integrity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The system performs preliminary data flushing from volatile cache to persistent memory before the actual shutdown occurs. When the power button is pressed, the system initiates a flush operation that transfers dirty pages from the volatile cache to persistent memory storage before cutting power, ensuring data is preserved even during ungraceful shutdowns.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If data is flushed to persistent memory before shutdown, then data integrity is improved, but shutdown time is increased

Engineering Contradiction:
Improvedata integrityVSAvoidshutdown time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system flushes only the dirty pages that need to be persisted, rather than flushing the entire memory space. The flush operation targets specifically those cache lines marked as dirty, performing a partial flush that is sufficient for data integrity without the overhead of a complete memory flush, thus minimizing shutdown time while maintaining reliability.

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If the system uses volatile cache for performance, then system responsiveness is improved, but data loss risk increases during power loss

Engineering Contradiction:
Improvesystem responsivenessVSAvoiddata durability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system uses persistent memory as an intermediary layer between the volatile cache and the final storage destination. Data flows from volatile cache through persistent memory to storage, allowing the volatile cache to maintain high performance while the persistent memory layer acts as a safety buffer that preserves data even if power is lost during the transfer process.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10545869B2Power button override for persistent memory enabled platforms
Publication Date: 2020.01.28 INTEL CORP
  • US10545869B2 patent drawing
  • US10545869B2 patent drawing
  • US10545869B2 patent drawing

AI summary

A power button override allows a persistent memory enabled platform to preserve data in persistent memory before initiating shutdown in a manner that is transparent to the user. The power button override prevents shutdown until all of the volatile cache and any other data in the platform has been flushed to persistent memory.