Power Chip Capacitor Array for Power Loss Data Protection
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Solution Overview
Problem
Non-volatile memory storage devices face data loss during power failures due to limited volatile memory cache, and existing solutions using capacitors are expensive and complex.
Innovation Solution
A power chip with an array of addressable capacitors, redundancy management control logic, and sensors detects power loss, providing power to integrated circuits and issuing a write command to ensure data is written from the buffer cache to non-volatile memory, using vertically integrated memory fabrication processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If supercapacitors are used to provide power during power failures, then data loss is prevented, but device complexity and cost increase
Solution Approach 1:
The patent replaces expensive, complex supercapacitors with a simple RC circuit using inexpensive resistors and capacitors that provide sufficient power for the brief period needed to complete a write operation. The capacitor array uses standard, low-cost components rather than specialized energy storage devices.
Solution Approach 2:
The power supply system is segmented into multiple addressable capacitor banks that can be individually activated. This allows the system to provide power during failure without requiring a single large, complex supercapacitor, reducing overall system complexity while maintaining reliability.
2Device complexity
If RC circuits are used instead of supercapacitors, then device complexity and cost are reduced, but power provision capability must be sufficient for write completion
Solution Approach 1:
The capacitors are pre-charged to the required voltage level during normal operation, so that when a power failure occurs, they immediately provide the necessary power without requiring complex power management or conversion circuits. The write operation is also pre-positioned in the buffer, ready to execute immediately upon power restoration or capacitor discharge.
Solution Approach 2:
The patent changes the parameters of the capacitor array (capacitance values, voltage levels, resistance values) to match the specific power and timing requirements of the write operation. This allows standard RC circuits to provide sufficient power for the brief duration needed, without requiring oversized or specialized components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents data loss during power failures by maintaining power supply levels and ensuring data is written to non-volatile memory, reducing the need for expensive capacitor solutions and enhancing reliability.
Implementation Method 1
A power chip with an array of addressable capacitors... provides power in the event of a power loss
Data Source
AI summary
Apparatuses and methods for providing power responsive a power loss are disclosed herein. A power chip may comprise a power sensor, a write command control logic, and an array. The power sensor may be configured to detect a power loss of a power supply and provide a power loss control signal responsive, at least in part, to detecting the power loss of the power supply. The write command control logic may be coupled to the power sensor and may be configured to receive the power loss control signal. The write command control logic may be further configured to provide a write command responsive, at least in part, to receipt of the power loss control signal. The array may include a plurality of capacitors configured to store power and further configured to provide power during the power loss.