Power Management Chip Edge Counting for Faster AMOLED Startup
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Solution Overview
Problem
Existing power management chips for AMOLED display devices require longer poweron times due to the delayed detection of rising edges of pulses, leading to increased startup and wake-up times, which negatively impact user experience.
Innovation Solution
Incorporating both rising-edge and falling-edge triggers within the power management chip to simultaneously detect and sum the number of edges of pulses, allowing for earlier generation of target voltages via a digital-to-analog converter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If only rising-edge trigger is used to detect pulses, then the circuit structure is simple, but the poweron time becomes longer
Solution Approach 1:
The patent combines both rising-edge trigger and falling-edge trigger in the power management chip to work simultaneously. The rising-edge trigger detects rising edges of pulses while the falling-edge trigger detects falling edges of pulses. This merging of two detection mechanisms allows the system to count complete pulse cycles faster, reducing the poweron time without significantly increasing circuit complexity.
2Loss of time
If rising-edge trigger and falling-edge trigger are used simultaneously, then the poweron time is reduced, but the device complexity increases
Solution Approach 1:
The first counter and second counter serve universal functions: they both count pulse edges (rising or falling) and their outputs are both fed to the adder. This multi-functionality allows the circuit to achieve faster poweron time while keeping the structural complexity manageable through functional reuse.
Solution Approach 2:
The falling-edge trigger and second counter are prepared and ready to operate simultaneously with the rising-edge trigger. By having both detection paths prepared in advance rather than sequentially, the system achieves faster poweron time without proportionally increasing complexity.
3Device complexity
If pulse detection starts later, then the timing is simpler, but the startup time and wake-up time increase
Solution Approach 1:
The patent implements continuous pulse detection by operating both rising-edge and falling-edge triggers simultaneously from the start. This continuous detection of both edge types allows the counter to accumulate pulse counts faster, reducing startup time and wake-up time while maintaining manageable timing control complexity.
Data Source
AI summary
A display device and a power management chip are provided. The power management chip includes a rising-edge trigger, detecting rising edges of a pulse signal; a first counter, configured to calculate the number of the rising edges; a falling-edge trigger, detecting falling edges of the pulse signal; a second counter, configured to calculate the number of the falling edges of the pulse signal; an adder, configured to sum up the number of the rising edges and the number of the falling edges of the pulse signal; and a digital-to-analog converter, electrically connected to the adder, configured to convert to a target voltage based on the sum obtained by the adder. In such a way, the poweron time of the power management chip is reduced.