Power Clamping Circuit With Voltage-Triggered EOS Discharge Path

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Solution Overview

Problem

Existing integrated circuits struggle to form an effective discharge path for electrical overstress (EOS) events, which can lead to EOS surge currents flowing into internal circuits and causing damage, as they typically last for microseconds, whereas existing power clamping circuits are inadequate in handling such events.

Innovation Solution

An integrated circuit for power clamping is designed with a switch, resistor, capacitor, inverter, and voltage detection circuit, where the voltage detection circuit connects the first node to the ground line when the power line voltage exceeds a threshold, activating the switch and forming a discharge path through the inverter to prevent EOS surge currents from entering the internal circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing power clamping circuits are used, then ESD protection is provided, but EOS events cannot be handled effectively

Engineering Contradiction:
ImproveEOS protection capabilityVSAvoidresponse to different stress durations
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The circuit employs dynamic response mechanisms where the voltage detection circuit continuously monitors power line voltage and activates the discharge path only when voltage exceeds the threshold, allowing the circuit to adapt its behavior based on real-time conditions rather than maintaining a fixed state

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The circuit changes its operational parameters based on the detected voltage level. During normal operation, the switch remains off. When voltage exceeds the threshold during an EOS event, the switch turns on to create a low-impedance discharge path, effectively changing the circuit's resistance parameter in response to the stress condition

Inventive Principle:
Principle #35Parameter changes

2Reliability

If existing power clamping circuits are used, then circuit structure is simple, but discharge path cannot be formed for EOS events

Engineering Contradiction:
Improvedischarge path formationVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The power clamping circuit is segmented into distinct functional modules: voltage detection circuit, control switch, and discharge path components. This segmentation allows each module to perform its specific function independently while working together to achieve EOS protection

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The voltage detection circuit acts as an intermediary between the power line and the control switch, monitoring voltage conditions and triggering the switch activation only when necessary, thereby mediating between normal operation and protection mode

Inventive Principle:
Principle #24Intermediary (Mediator)

3Object-affected harmful factors

If existing power clamping circuits are used, then ESD surge current is blocked, but EOS surge current flows into internal circuit

Engineering Contradiction:
ImproveEOS surge current blockingVSAvoidinternal circuit protection
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The circuit prepares for EOS events by continuously monitoring voltage levels and having the discharge path components ready to activate. When voltage exceeds the threshold, the switch rapidly turns on to create the discharge path before the EOS surge current can damage the internal circuit

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The circuit converts the harmful EOS surge current into a beneficial protective mechanism by using the excessive voltage itself as the trigger signal to activate the discharge path, thereby transforming the harmful condition into the activation signal for protection

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS20230361108A1Integrated circuit for power clamping
Publication Date: 2023.11.09 REALTEK SEMICON CORP
  • US20230361108A1 patent drawing
  • US20230361108A1 patent drawing
  • US20230361108A1 patent drawing

AI summary

An integrated circuit for power clamping is provided. The integrated circuit for power clamping is electrically coupled to an internal circuit of an integrated circuit through a power line and a ground line, and includes a switch, a first resistor, a capacitor, an inverter and a voltage detection circuit. The voltage detection circuit detects a voltage of the power line, and when the voltage of the power line exceeds a threshold value, the voltage detection circuit electrically connects a first node to the ground line, such that a low potential signal from the ground line is input to the input terminal of the inverter, and then the switch is turned on to form a discharge path.