Multi-channel Power Combiner with Adjustable Back Gate Bias

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Solution Overview

Problem

Semiconductor devices used in mm-wave applications, such as vehicular radar and 5G communication devices, face challenges with output power loss and variations due to frequency-modulated continuous wave (FMCW) transmitters.

Innovation Solution

A multi-channel power combiner with phase alignment circuits using PMOS and NMOS transistors with adjustable back gate bias voltage, and a power combiner circuit to combine the outputs of each channel, along with a back gate voltage generator to adjust the bias voltage for improved power amplification.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If conventional power combiners are used in FMCW transmitters, then the device structure is simple, but output power loss and variations occur

Engineering Contradiction:
Improveoutput powerVSAvoiddevice structure
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The power combiner is divided into multiple independent channels (first channel, second channel, etc.), each with its own phase alignment circuit and power amplifier. This segmentation allows independent adjustment of each channel's phase and power, enabling compensation for power variations and phase mismatches while maintaining overall system functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention introduces adjustable back gate bias voltages to the transistors in each channel's phase alignment circuit and power amplifier. This dynamic adjustment capability allows real-time optimization of each channel's performance, compensating for power loss and phase variations without requiring a complete redesign of the combiner structure.

Inventive Principle:
Principle #15Dynamics

2Power

If phase alignment circuits with adjustable back gate bias voltage are added to each channel, then output power is improved, but device complexity increases

Engineering Contradiction:
Improveoutput powerVSAvoidcircuit structure
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The back gate bias voltage adjustment mechanism serves multiple functions simultaneously: it adjusts the operating point of transistors, compensates for phase mismatches, and optimizes power output. This multi-functionality reduces the need for separate adjustment circuits, thereby limiting the increase in device complexity while achieving power improvement.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention changes the electrical parameters (back gate bias voltages) of existing transistors to achieve phase and power adjustment, rather than adding entirely new components. This parameter-based adjustment approach improves output power while minimizing structural complexity changes.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If multiple channels with phase alignment circuits are used, then phase mismatch compensation is achieved, but manufacturing complexity increases

Engineering Contradiction:
Improvephase alignmentVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The phase alignment circuits are designed with predetermined adjustable parameters that can be configured during the manufacturing process. By preparing the adjustment mechanisms in advance and designing them for systematic configuration, the manufacturing process becomes more structured and manageable, reducing the complexity increase despite the multi-channel design.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11114736B2Multi-channel power combiner with phase adjustment
Publication Date: 2021.09.07 GLOBALFOUNDRIES US INC
  • US11114736B2 patent drawing
  • US11114736B2 patent drawing
  • US11114736B2 patent drawing

AI summary

Power combiners having increased output power, such as may be useful in millimeter-wave devices. The power combiner comprise at least two channels, wherein each channel comprises a phase alignment circuit, wherein the phase alignment circuit comprises a first differential input subcircuit comprising a first inverter and a second inverter, and a second differential input subcircuit comprising a third inverter and a fourth inverter, wherein the first inverter, the second inverter, the third inverter, and the fourth inverter each comprise a PMOS transistor and an NMOS transistor each having an adjustable back gate bias voltage. By adjusting the back gate bias voltage, the phases of the signal through each channel may be aligned, which may increase the output power of the power combiner. Methods of increasing output power of such power combiners. Systems for manufacturing devices comprising such power combiners.