Power-Conscious I/O Buffer Allocation to Extend Low-Power Residency
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Solution Overview
Problem
Legacy host systems fail to maximize residency in low-power states due to inadequate consideration of buffer management in data transfer scheduling, leading to inefficient power usage in I/O subsystems.
Innovation Solution
Implement a buffer controller with a bandwidth management module and an I/O buffer management module to proactively schedule data transfers, optimizing residency in low-power states by analyzing parameters such as available bandwidth, latency, and power state entry/exit times, and utilizing USB power saving states to minimize power consumption without compromising performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If buffering is limited for scheduling transfers, then device complexity is reduced, but power management performance deteriorates
Solution Approach 1:
The patent changes the parameter of buffer allocation from fixed/limited to dynamic/power-conscious. The host system now determines buffer allocations based on power management criteria, allowing buffers to be allocated or deallocated according to current power state requirements, thereby reducing I/O subsystem power consumption while maintaining scheduling capability
Solution Approach 2:
The patent introduces dynamic buffer management where buffer allocations are not static but adapt based on power management needs. The system can dynamically adjust buffer sizes and allocations in response to power state changes, enabling the I/O subsystem to enter and remain in low-power states more effectively
2Use of energy by stationary object
If buffer allocations are optimized for power saving, then energy efficiency improves, but data transfer scheduling performance may deteriorate
Solution Approach 1:
The patent applies preliminary action by having the host system proactively determine and communicate buffer allocations to the I/O subsystem before data transfers occur. This allows the I/O subsystem to be properly configured for upcoming transfers while maintaining power-saving states, rather than reacting with limited buffers after scheduling decisions are made
Solution Approach 2:
The patent implements feedback through the communication channel between host system and I/O subsystem. The host system monitors power management needs and transfer requirements, then adjusts buffer allocations accordingly and communicates these allocations back to the I/O subsystem, creating a closed-loop system that balances power saving with transfer efficiency
Data Source
AI summary
Embodiments provide apparatuses, systems, and methods related to an electronic device that includes first one or more ports to transmit data from the electronic device, and one or more buffers to buffer the data prior to transmission of the data on the ports. The electronic device may further includes a bandwidth management module to: identify a bandwidth required to transmit an amount of the data on the first one or more ports; identify bandwidth-related parameters of the first one or more ports; and identify, based on the bandwidth-related parameters and the bandwidth required to transmit the amount of the data, buffer allocation of the data. The electronic device may further include a buffer management module coupled with the bandwidth management module, the buffer management module to allocate the data to the one or more buffers based on the buffer allocation. Other embodiments may be described and claimed.