Power Control Circuit Soft Start Noise Reduction
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Solution Overview
Problem
Comparator-type DC-DC converters face challenges in reducing broadband radiated noise due to switching frequency changes, which can degrade performance in devices using high-frequency signals, and require additional circuits for clock generation and frequency balancing.
Innovation Solution
A power control circuit with a counter circuit that performs a soft start operation and divides the switching frequency, allowing a comparator to compare the divided frequency with a reference frequency and correct the switching frequency, thereby reducing noise and eliminating the need for external clock generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If the switching frequency is controlled to be constant using a phase comparator and reference clock signal, then broadband radiated noise is reduced, but additional clock generation circuits and frequency division circuits are required, increasing device complexity
Solution Approach 1:
The patent merges the soft start function and frequency division function into a single counter circuit. During soft start, the counter circuit counts clock cycles to control startup timing. During normal operation, the same counter circuit divides the switching frequency by a predetermined value N. This eliminates the need for separate clock generation and frequency division circuits, reducing device complexity while maintaining constant switching frequency control to minimize radiated noise
Solution Approach 2:
The counter circuit is designed to perform multiple functions: it acts as a soft start controller during startup phase and as a frequency divider during normal operation. The comparator also serves dual purposes by comparing both the soft start timing signal and the divided frequency signal. This multi-functionality reduces the overall number of components needed in the DC-DC converter
2Ease of operation
If a reference clock signal is input from outside or generated by an additional clock generation circuit, then the switching frequency can be controlled, but the device complexity increases due to additional circuits
Solution Approach 1:
The DC-DC converter generates its own timing reference by using the switching signal itself as the input to the counter circuit. The counter divides this internal switching frequency by a predetermined value N to create a controlled timing signal. This self-service approach eliminates the need for external clock signals or separate clock generation circuits, reducing device complexity while maintaining precise switching frequency control
Data Source
AI summary
A power control circuit includes a control circuit configured to perform a soft start operation before a power supply device performs a normal operation. The power control circuit also includes a counter circuit configured to divide a switching frequency of the power supply device in the normal operation, wherein the counter circuit measures a period of the soft start operation and when the period lasts for a set length, starts to divide the switching frequency, and wherein the power control circuit causes a comparator comprising the counter circuit to compare the frequency obtained by dividing the switching frequency with a reference frequency and corrects the switching frequency.