Power Control Block Switching to Prevent Output Glitches

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Device leakage current poses a significant challenge in modern circuit designs, particularly in low power circuits, as existing methods to reduce it either impact device performance, increase costs, or require impractical and time-intensive processing steps.

Innovation Solution

A method and device architecture that selectively switch between normal and low power operation modes, disabling signal paths to prevent glitches and continuing power to signal sources until paths are disabled, allowing for reduced leakage current without performance degradation or increased costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the length of devices (e.g., transistors) is increased to reduce leakage current, then leakage current is reduced, but device performance deteriorates due to less drain saturation current

Engineering Contradiction:
Improveleakage currentVSAvoiddevice performance
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The circuit is divided into multiple independently controllable segments with separate power control. Each segment can be individually powered on or off based on operational needs, allowing leakage reduction in inactive segments while maintaining full performance in active segments.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Power control blocks are designed to preemptively disable signal paths before mode switching occurs. This preliminary action prevents glitches by ensuring that signal paths are already disabled before the actual mode transition, eliminating the need for lengthy processing steps.

Inventive Principle:
Principle #10Preliminary action

2Loss of energy

If the density of logic circuitry is reduced to reduce leakage current, then leakage current is reduced, but application requirements cannot be met due to insufficient logic operations

Engineering Contradiction:
Improveleakage currentVSAvoidlogic operations capability
Core Design Contradiction:
Loss of energyVSAdaptability or versatility

Solution Approach 1:

The logic circuitry density is made dynamic through time-multiplexed operation. High-density logic circuits operate at full capacity during active periods to meet application requirements, while being completely powered down during idle periods to minimize leakage, thus adapting between performance and power consumption modes.

Inventive Principle:
Principle #15Dynamics

3Loss of energy

If device manufacturers increase the efficiency of individual devices to reduce leakage current, then leakage current is reduced, but the process becomes cumbersome, time intensive, and expensive

Engineering Contradiction:
Improveleakage currentVSAvoidmanufacturing process complexity
Core Design Contradiction:
Loss of energyVSEase of manufacture

Solution Approach 1:

Power control blocks serve as intermediary components that manage power distribution to logic circuits. These intermediaries enable leakage reduction through simple power gating mechanisms rather than requiring complex modifications to the devices themselves, simplifying the manufacturing process while achieving power savings.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If the signal path is disabled to prevent glitches during mode switching, then signal integrity is maintained, but power cannot be reduced immediately until after the path is disabled

Engineering Contradiction:
Improvesignal integrityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The signal path disabling action is performed preliminarily before the actual mode switching completes. This ensures signal integrity is maintained from the outset of the transition, and power can be subsequently reduced to the signal source once the path is confirmed disabled, optimizing both reliability and power consumption.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8314634B1Power control block with output glitch protection
Publication Date: 2012.11.20 LATTICE SEMICON CORP
  • US8314634B1 patent drawing
  • US8314634B1 patent drawing
  • US8314634B1 patent drawing

AI summary

Techniques are provided to reduce glitches at an output signal node when a device is switched to and from a low power operation mode. In one example, a method of operating a device includes providing power to operate a signal source of the device during a normal operation mode of the device. The method also includes passing an output signal from the signal source through a signal path to an output node during the normal operation mode. The method also includes receiving an operation mode signal to switch the device from the normal operation mode to a low power operation mode. The method also includes disabling the signal path to prevent glitches from appearing at the output node during the switch from the normal operation mode to the low power operation mode. The method also includes continuing providing power to the signal source until after the signal path is disabled.