Power Control Circuit Phase Detection for Burst Mode Noise Reduction
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Solution Overview
Problem
Switched mode power supplies experience reduced transformation efficiency and potential audio noise when operating under light-load or no-load conditions due to inappropriate power control during burst mode, leading to increased power consumption and noise within audible frequency ranges.
Innovation Solution
The implementation of a power management controller that depresses the group frequency of the power supply to below 1 kHz, utilizing a phase controller, peak fixer, and compensation loop controller to manage switching states and current detection, ensuring the power supply operates within non-audible frequency ranges and reduces power consumption by controlling the clock signal and burst signal transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the power supply operates in burst mode under light-load or no-load conditions, then power consumption is reduced, but audio noise occurs when group frequency falls within audible frequency range
Solution Approach 1:
The patent changes the group frequency parameter by detecting the phase of the burst initializing signal and adjusting the clock signal accordingly. When the phase indicates a risk of audible frequency, the system modifies the switching timing to shift the group frequency below 1 kHz, thereby eliminating audio noise while maintaining burst mode power savings
Solution Approach 2:
The patent implements feedback by detecting the phase of the burst initializing signal SBST and using this information to control the clock signal SCLK. The phase detection mechanism provides feedback about the current switching state, allowing the system to adjust timing parameters dynamically to avoid audible frequency ranges while maintaining optimal power consumption
2Loss of energy
If the power supply enters skip mode or burst mode, then transformation efficiency improves under light-load conditions, but power consumption increases if not properly controlled
Solution Approach 1:
The patent uses feedback from the burst initializing signal phase detection to dynamically control the clock signal timing. This feedback mechanism ensures the power supply transitions between skip mode and burst mode optimally, maintaining high transformation efficiency while preventing excessive power consumption during mode transitions
Solution Approach 2:
The patent makes the switching control dynamic by continuously monitoring the phase of the burst initializing signal and adjusting the clock signal timing in real-time. This dynamic adjustment allows the system to adapt to changing load conditions, maintaining optimal transformation efficiency and power consumption characteristics
Data Source
AI summary
In a switching mode power supply, a power controlling circuit includes a phase generator and a phase controller. The phase generator provides a clock signal. The phase controller detects phases of a phase reference signal and a burst initialization signal so as to generate a burst signal, and causes a phase of the burst signal to not be earlier than the phase of the group reference signal. The burst signal is utilized for switching the power supply between a non-switching state and a switching state. The group reference signal is generated according to the clock signal and has a lower frequency than the clock signal. The burst initialization signal is controlled by an output voltage source of the power supply.