Power Controlling IC Cell for Leakage Reduction
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Solution Overview
Problem
The increasing complexity and power consumption of integrated circuits due to reduced semiconductor sizes and lower threshold voltage elements lead to higher leakage currents, necessitating power controlling mechanisms that introduce additional complexity and potential power surges during power-up operations.
Innovation Solution
The introduction of power controlling integrated circuit cells with a power switching circuit and a power control signal buffer circuit, which selectively connect switched and unswitched power supply lines, reducing peak current consumption by introducing a delay in power control signal propagation and phased charging of power supply lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If power controlling mechanisms are introduced to reduce leakage current, then power consumption is reduced, but device complexity increases due to additional control circuits and routing
Solution Approach 1:
The patent combines the power control signal buffer circuit with the power switching circuit into a single integrated cell. The buffer circuit is positioned to be at least partially powered from the unswitched power supply input and responsive to the switched power supply output, merging multiple functions (power buffering, signal distribution, and switching control) into one unified structure, thereby reducing overall device complexity while maintaining power control capabilities
Solution Approach 2:
The power controlling integrated circuit cell serves multiple functions simultaneously: it acts as a power switch to connect/disconnect power supply lines, functions as a buffer circuit to drive power control signals, and provides phased charging capability to reduce power surges. This multi-functionality reduces the need for separate dedicated circuits for each function
2Speed
If multiple power switches are turned on simultaneously to restore power to multiple portions of integrated circuit, then power restoration speed is improved, but power surges increase due to peak current demands
Solution Approach 1:
The buffer circuit introduces a deliberate delay in the propagation of the power control signal. When a power control input signal is received, the buffer circuit processes it and outputs the power control output signal after a controlled time delay. This preliminary action ensures that power switches are activated in a phased manner rather than simultaneously, reducing peak current demands while still restoring power to multiple portions of the integrated circuit
Solution Approach 2:
The patent implements phased charging of power supply lines through the buffered power control signals. Instead of all power switches turning on at once, the buffering mechanism creates a periodic or sequential activation pattern where power is restored to different portions of the integrated circuit in phases, thereby managing peak current demands while maintaining acceptable power restoration speed
3Ease of operation
If buffer elements are provided to drive control signals across the integrated circuit, then signal distribution capability is improved, but power consumption increases because buffers require permanent power supply
Solution Approach 1:
The buffer circuit is integrated with the power switching circuit within the same power controlling integrated circuit cell. The buffer is positioned to be at least partially powered from the unswitched power supply input and responsive to the switched power supply output, combining the buffering function with the power control function in a single unit, thereby reducing overall power consumption compared to having separate buffer circuits distributed throughout the integrated circuit
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces power surges and leakage currents by managing power distribution efficiently, allowing for controlled power-up and power-down operations while maintaining system functionality.
Implementation Method 1
a power switching circuit responsive to a power control input signal received at said power control signal input to selectively connect said switched power supply output to said unswitched power supply input
Implementation Method 2
a power control signal buffer circuit at least partially powered from said unswitched power supply input and responsive to said switched power supply output to drive a power control output signal from said power control signal output
Data Source
AI summary
A power controlling integrated circuit cell is provided within an integrated circuit power grid to selectively couple an unswitched power supply input to a switched power supply output. The power controlling integrated circuit cell also includes a power control signal input and a power control signal output for supporting the distribution through the integrated circuit of the power control signal. The power controlling integrated circuit cell has a power switching circuit responsive to a power control input signal received at the power control signal input to selectively connect the switched power supply output to the unswitched power supply input, and a power control signal buffer circuit responsive to the switched power supply output to drive a power control output signal from the power control signal output.