Power Conversion Device Carrier Synchronization
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Solution Overview
Problem
Existing AC-AC power converting apparatuses without a DC link face challenges in compensating for input current distortions caused by zero voltage vectors and dead time, requiring complex switching control due to different carriers used by converters and inverters.
Innovation Solution
Employing the same carrier for both converters and inverters, with a carrier generating unit producing a triangular or sawtooth wave with a constant slope, and using gate signal generating units to control switching based on specific reference values and command values to manage zero voltage vectors and dead time, thereby simplifying PWM control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If different carriers are used by converters and inverters, then switching control can be performed independently, but input current distortions occur due to zero voltage vectors and dead time
Solution Approach 1:
The patent merges the carrier signals of the converter and inverter into a single common carrier. By using the same triangular carrier wave for both PWM modulations, the switching instants become synchronized, allowing the zero voltage vector periods to be aligned and eliminating the input current distortions that occur when different carriers are used independently.
Solution Approach 2:
The patent changes the carrier parameter (frequency and waveform) to be identical for both converter and inverter. Specifically, a triangular carrier wave with constant slope is used, and the switching patterns are adjusted based on this common carrier to achieve proper synchronization while eliminating harmful current distortions.
2Object-generated harmful factors
If the same carrier is used for both converters and inverters, then input current distortions are removed, but switching control becomes complex
Solution Approach 1:
The patent performs preliminary action by pre-calculating and storing the switching patterns in lookup tables before operation. The switching patterns are determined in advance based on the common carrier and the required output voltages, eliminating the need for complex real-time calculations during operation and simplifying the control implementation.
Solution Approach 2:
The patent uses copying by generating the inverter switching pattern as a copy of the converter switching pattern, adjusted only by the appropriate time offset. This approach leverages the common carrier to create synchronized switching patterns without requiring independent complex control logic for each stage.
3Reliability
If dead time is provided to prevent short-circuit, then switching safety is improved, but input current distortion increases
Solution Approach 1:
The patent applies feedback by detecting the actual switching instants and adjusting the PWM modulation to compensate for dead time effects. The control system monitors the switching patterns and makes real-time adjustments to maintain proper current waveforms while preserving the necessary dead time for safe switching operation.
Solution Approach 2:
The patent changes the dead time parameter dynamically based on the switching state and load conditions. By adjusting the dead time duration and placement according to the common carrier synchronization, the system maintains switching safety while minimizing the harmful effects on input current quality.
Data Source
Figure 1~2B
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AI summary
Provided is a power converting apparatus capable of easily generating a carrier while suppressing a distortion of an input current waveform. A switch device (Srp) is brought into conduction in a case where a carrier (C1) takes a value zero to drt, a switch device (Ssp) is brought into conduction in a case where the carrier (C1) takes a value the drt to one, and one cycle (T) of the carrier (C1) is divided into a period (Ts) in which the carrier (C1 has a command value or more and a period (Tr) in whi ch the carrier (C1) has the command value or less. The periods (Ts, Tr) are calculated by dst·T and drt·T, respectively. The same one as the carrier (C1) of a converter (1) is employed in a carrier (C2) of an inverter (2), and based on the value drt set as a reference value, a command value of the inverter (2) is provided in each of a side with a value larger than the preference value and a side with a value smaller than the reference value. The period (Ts) in which the carrier (C2) takes the value (drt) or more is divided at a ratio among d0, d4 and d6, and the period (Ts) in which the carrier (C2) takes the value drt or less is divided at the ratio among d0, d4 and d6.