Power Converter Control Circuit Shared Pin Architecture
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Solution Overview
Problem
The existing control circuits for power converters require a large number of package pins, leading to increased package size and reduced design flexibility, as they need to accommodate multiple pins for configuring the power stage circuit and receiving feedback signals, which results in wasted materials and limited miniaturization of IC elements.
Innovation Solution
A control circuit for power converters utilizing a shared pin, coupled with a resistor, driving circuit, current source circuit, and signal processing circuit, which samples signals in different intervals to generate sampling values and compares them to configure the conduction time and frequency of a switch based on predetermined differences, thereby reducing the number of package pins required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple pins are used to couple control circuit with power stage circuit and feedback signals, then the control circuit can configure power stage circuit and receive feedback signals, but the package size increases and design flexibility is constrained
Solution Approach 1:
The shared pin is designed to perform multiple functions: configuring the power stage circuit, receiving feedback signals, and providing sampling points for voltage detection. By making the pin universal rather than dedicated to a single function, the patent reduces the total number of pins required while maintaining full control circuit functionality.
Solution Approach 2:
The patent merges multiple functions into a single shared pin, combining the configuration function and feedback reception function into one physical pin. This merging approach directly reduces package pin count and size while preserving all necessary control operations.
2Area of stationary object
If shared pins are used to reduce pin number and package size, then package materials are reduced and IC element dimension is reduced, but the circuit blocks must be carefully designed to ensure correct functionality
Solution Approach 1:
The patent implements preliminary action by providing a default pull-up resistance value (e.g., 10kΩ) that is pre-configured in the control circuit. This default configuration ensures correct functionality without requiring complex external circuit design, thereby reducing design complexity while maintaining package size benefits.
Solution Approach 2:
The control circuit performs self-service by internally generating the pull-up resistance and managing the shared pin configuration without requiring complex external components. This self-service approach simplifies the overall circuit design while preserving the pin-reduction benefits.
3Quantity of substance
If shared pin is used for both configuring power stage circuit and receiving feedback signals, then pin count is reduced, but signal sampling and differentiation become challenging
Solution Approach 1:
The patent employs periodic action by sampling the voltage signal at different time intervals (first time interval, second time interval, third time interval) within each switching period. This periodic sampling approach enables accurate detection and differentiation of signals even on a shared pin, maintaining signal sampling accuracy while reducing pin count.
Solution Approach 2:
The patent uses feedback mechanisms by comparing sampled voltages at different time intervals and using this information to determine switching states. The feedback loop processes the sampled signals to distinguish between different operational conditions, thereby maintaining signal detection accuracy despite using fewer pins.
Data Source
AI summary
A control circuit for a power converter is disclosed, having a shared pin, a driving circuit, a current source, a sampling circuit, and a signal processing circuit. The shared pin is used for coupling with an output end of the power converter through a resistor. The driving circuit is used for conducting a switch of the power converter. The current source provides a current to the resistor through the shared pin. The sampling circuit samples the signal on the shared pin for generating a first sampling value and a second sampling value. When the difference between the first sampling value and the second sampling value is less than a predetermined value, the signal processing circuit configures the driving circuit to adjust at least one of the conduction time and the conduction frequency of the switch according to an output signal of the power converter received from the shared pin.