Power Converter Driver Using Negative Voltage Generation
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Solution Overview
Problem
Conventional power converters face efficiency issues due to reduced driving voltage caused by forward bias voltage, leading to increased on-resistance of high side switches and decreased power conversion efficiency as battery voltage decreases.
Innovation Solution
A driver and driving control method for power converters that includes a level shift circuit, a negative voltage generator, and a PMOS transistor, which generates a driving voltage higher than the reduced operation voltage by producing a third operation voltage lower than the second operation voltage, thereby reducing the on-resistance of the PMOS transistor and enhancing the power supply for high side switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a diode is used to charge the capacitor with operation voltage VCC, then the current flows unidirectionally to charge the capacitor, but the forward bias voltage of the diode reduces the maximum voltage value of the capacitor to VCC-Vf
Solution Approach 1:
The patent extracts the diode from the charging circuit and replaces it with a switch-controlled charging path. The diode's unidirectional current flow function is removed, and its voltage drop penalty is eliminated by using an active switch that can control current direction without significant voltage loss.
Solution Approach 2:
The patent changes the charging mechanism from passive diode-based charging to active switch-controlled charging. By using a switch instead of a diode, the forward voltage drop parameter is eliminated, allowing the capacitor to charge to the full VCC voltage level rather than VCC-Vf.
2Duration of action of moving object
If the operation voltage VCC decreases with battery energy consumption, then the battery voltage reduces over time, but the driving voltage VB1 also decreases leading to increased on-resistance of the high side switch
Solution Approach 1:
The patent implements a bootstrap capacitor that is charged in advance to the full VCC voltage level before the high side switch activation. This preliminary charging action ensures that the driving voltage is already at maximum level, compensating for any future VCC degradation and maintaining reliable switch on-condition throughout battery life.
Solution Approach 2:
The bootstrap capacitor serves as a voltage buffer that cushions against VCC voltage drops. By pre-charging this capacitor to the maximum voltage, the system creates a voltage reserve that maintains stable driving voltage for the high side switch even as the battery voltage decreases over time.
3Use of energy by moving object
If the driving voltage VB1 is reduced due to battery voltage decrease, then the voltage value of VB1 decreases, but the on-resistance of the high side switch increases and power conversion efficiency decreases
Solution Approach 1:
The patent changes the driving voltage generation method to use a bootstrap capacitor charged to full VCC level. This parameter change ensures that the driving voltage VB1 maintains its maximum value throughout operation, preventing the voltage-dependent increase in on-resistance and associated power losses.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for a larger driving voltage and reduced on-resistance of the PMOS transistor, conserving circuit area and improving power conversion efficiency by maintaining a higher driving voltage without the need for enlarging the PMOS transistor size.
Implementation Method 1
a forward bias Vf of the diode 02 is 0.7 volt
Implementation Method 2
the maximum voltage value of the capacitor Cb is the operation voltage Vcc minus the forward bias Vf
Data Source
AI summary
A driver and a driving control method for a power converter are provided. The driver includes a level shift circuit, a negative voltage generator and a first PMOS transistor. The level shift circuit provides an output signal, wherein the output signal has a first operation voltage and a second operation voltage. When the output signal received by the negative voltage generator is the first operation voltage, the negative voltage generator outputs the first operation voltage. When the output signal received by the negative voltage generator is the second operation voltage, the negative voltage generator generates and outputs a third operation voltage, and the third operation voltage is lower than the second operation voltage. A control terminal of the first PMOS transistor is coupled to an output terminal of the negative voltage generator. An output terminal of the first PMOS transistor provides a driving voltage.