Power Converter Signal Isolation for Fast dV/dt Events

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Solution Overview

Problem

Existing power converter technologies face challenges in handling fast dV/dt events, leading to spurious data transfers, ringing, and electromagnetic interference (EMI), particularly in high-frequency applications using gallium nitride (GaN) or silicon carbide (SiC) switches.

Innovation Solution

The implementation of a data communication channel with a transmitter, a signal isolator, and a receiver, where the receiver includes a dV/dt detector circuit to stop output data production during rapid voltage changes, and the transmitter sends a refresh signal once the dV/dt event has passed, using cross-coupled capacitors and mismatch compensation capacitors to enhance signal isolation and reduce parasitic elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional power converter circuits are used without dV/dt detection, then the circuit can operate continuously, but spurious data transfers and EMI occur during fast dV/dt events

Engineering Contradiction:

Improvedata integrityVSAvoidspurious data transfers and EMI

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The dV/dt detector circuit proactively monitors voltage changes before they can cause spurious data transfers. By detecting rapid voltage changes in advance and triggering the stop signal, the system prevents harmful effects rather than reacting to them after occurrence

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The dV/dt detector circuit acts as an intermediary between the power converter circuit and the data communication channel. It monitors the electrical conditions and mediates by generating stop signals to prevent direct interference between voltage transients and data transmission

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If the receiver continuously produces output data, then productivity is high, but data integrity is compromised during fast dV/dt events

Engineering Contradiction:

Improvedata transmission rateVSAvoiddata integrity

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The data production capability of the receiver is made dynamic rather than static. The receiver can switch between continuous production mode and stopped production mode based on real-time dV/dt conditions, optimizing both productivity and reliability adaptively

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The dV/dt detector provides feedback about voltage change conditions to the receiver. This feedback loop enables the receiver to adjust its data production behavior accordingly, stopping when harmful dV/dt events are detected and resuming when conditions are safe

Inventive Principle:

Principle #23Feedback

3Reliability

If signal isolator with cross-coupled capacitors is used, then voltage isolation is improved, but parasitic capacitance effects increase

Engineering Contradiction:

Improvevoltage isolationVSAvoidparasitic capacitance effects

Core Design Contradiction:

ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The parasitic capacitance of the cross-coupled capacitors, which initially appears harmful, is utilized beneficially for dV/dt detection. The same capacitive coupling that provides voltage isolation also enables the detector to sense rapid voltage changes, converting a potential harm into a useful detection mechanism

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively handles fast dV/dt events, ensuring data integrity, reducing ringing and EMI, and enabling operation at high frequencies with high voltage isolation, while also mitigating the effects of parasitic capacitances in the semiconductor package.

Implementation Method 1

a dV/dt detector circuit coupled to the receive node and arranged to stop the production of the output data at the output terminal when the dV/dt detector circuit detects a rate of change of voltage with respect to time greater than a predetermined threshold

Methodology Applied

Scientific EffectdV/dt detection:

Implementation Method 2

the signal isolator includes plurality of cross-coupled capacitors

Methodology Applied

Scientific EffectCapacitance: Capacitance

Implementation Method 3

the signal isolator includes one or more mismatch compensation capacitors

Methodology Applied

Scientific EffectCapacitance compensation: Capacitance

Data Source

PatentUS12212440B2Systems and methods for signal isolation in power converters

Publication Date: 2025.01.28 NAVITAS SEMICON LTD

AI summary

A circuit is disclosed. The circuit includes a transmitter having an input terminal arranged to receive input data and a transmission node arranged to transmit intermediate data corresponding to the input data, and a receiver having a receive node arranged to receive the intermediate data and an output terminal arranged to produce output data corresponding to the input data, the receiver further including a dV/dt detector circuit coupled to the receive node and arranged to stop the production of the output data at the output terminal when the dV/dt detector circuit detects a rate of change of voltage with respect to time greater than a predetermined threshold.