Power Converter Architecture with Segmented Buck Converters
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Solution Overview
Problem
Existing power conversion circuits face challenges in achieving high power factor while minimizing component voltage stress, reducing energy storage requirements, and increasing power density and efficiency, particularly in grid interface applications.
Innovation Solution
A new power conversion architecture that includes a line frequency rectifier, a stack of capacitors, a set of regulating converters, and a power combining converter, with a controller modulating input currents to enhance power factor, utilizing topologies such as inverted resonant-transition buck converters and switched capacitor circuits to achieve high switching frequencies and low voltage stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a boost converter is used in a PFC circuit to achieve high power factor capability, then power factor is improved, but component voltage stress increases and efficiency deteriorates
Solution Approach 1:
The PFC circuit is segmented into multiple parallel buck converters instead of using a single boost converter. Each buck converter handles a portion of the input power, distributing the voltage stress across multiple components. The parallel configuration allows each converter to operate at lower voltage stress while collectively achieving the required power factor correction.
Solution Approach 2:
The patent inverts the conventional PFC approach by using buck converters (stepping down voltage) instead of boost converters (stepping up voltage). This inversion allows the circuit to draw current in a sinusoidal pattern while operating at lower voltage stress levels, achieving high power factor without the high voltage stress and efficiency losses associated with traditional boost converter PFC circuits.
2Stress or pressure
If a buck converter is used in a PFC circuit to reduce voltage stress, then component voltage stress is reduced, but power factor capability deteriorates
Solution Approach 1:
Multiple buck converters are merged in parallel to collectively achieve high power factor correction. While a single buck converter may not provide sufficient power factor capability, the combined effect of multiple synchronized buck converters drawing current in unison creates a sinusoidal input current waveform, achieving power factor comparable to or exceeding traditional boost converter PFC circuits while maintaining lower voltage stress.
Solution Approach 2:
The patent uses multiple buck converters, potentially more than the minimum required for power factor correction. This excessive action ensures that even if individual converters operate with clipped current waveforms, their combined effect achieves the desired sinusoidal input current and high power factor, while the redundancy allows for flexible distribution of voltage stress across components.
3Reliability
If high voltage rated components are used to handle peak voltage, then voltage stress is managed, but power density and efficiency deteriorate
Solution Approach 1:
The patent changes the operating voltage parameters by using parallel buck converters that each operate at a fraction of the peak input voltage. Instead of requiring components rated for the full peak voltage (e.g., 300-600V), each buck converter operates at lower voltage levels, allowing the use of lower voltage-rated components with higher power density and efficiency characteristics.
4Reliability
If a large output capacitor is used to buffer twice-line-frequency energy, then energy buffering is achieved, but power density and efficiency deteriorate
Solution Approach 1:
The energy buffering function is segmented and distributed across multiple smaller capacitors associated with each parallel buck converter, rather than using a single large capacitor. This distribution reduces the total capacitance required while maintaining the ability to buffer twice-line-frequency energy, improving power density and efficiency.
Data Source
AI summary
A power converter circuit rectifies a line voltage and applies the rectified voltage to a stack of capacitors. Voltages on the capacitors are coupled to a plurality of regulating converters to be converted to regulated output signals. The regulated output signals are combined and converted to a desired DC output voltage of the power converter. Input currents of the regulating converters are modulated in a manner that enhances the power factor of the power converter.