Power Converter Light Load Efficiency via Zero-Crossing Pulse Skipping

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Solution Overview

Problem

Power converters face challenges in efficiently managing power consumption during light load states, requiring innovative solutions to reduce power consumption while maintaining operational efficiency.

Innovation Solution

A power converting device and method that includes a filter circuit, load detecting circuit, oscillation circuit, and control circuit, which switch between pulse width modulation and pulse-skipping modes based on load conditions, using a zero-crossing comparison circuit, counting circuit, and logic circuit to adjust frequency and operating modes, thereby optimizing power usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If pulse width modulation mode is used during light load operation, then power consumption is higher, but if pulse-skipping mode is used, then power consumption is reduced while maintaining output stability

Engineering Contradiction:
Improvepower consumptionVSAvoidoutput stability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent implements dynamic switching between pulse width modulation mode and pulse-skipping mode based on real-time load detection. When light load is detected, the system transitions from PWM mode to pulse-skipping mode, and when load increases, it switches back to PWM mode. This dynamic adaptation optimizes power consumption across different operating conditions while maintaining output stability through mode-dependent control parameters.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes operating parameters including switching frequency and duty cycle based on load conditions. During light load operation in pulse-skipping mode, the switching frequency is reduced compared to PWM mode, directly lowering power consumption. The duty cycle is dynamically adjusted to maintain stable output voltage despite the change in modulation mode, resolving the contradiction between energy efficiency and output reliability.

Inventive Principle:
Principle #35Parameter changes

2Loss of energy

If switching frequency is reduced during light load, then switching losses are reduced, but frequency stability must be maintained

Engineering Contradiction:
Improveswitching lossesVSAvoidfrequency stability
Core Design Contradiction:
Loss of energyVSSpeed

Solution Approach 1:

The patent employs feedback mechanisms where the control circuit continuously monitors the output voltage and inductor current. Based on this feedback, the system adjusts the switching frequency and duty cycle to maintain stable output. During light load pulse-skipping operation, the feedback ensures that even though switching frequency is reduced to minimize switching losses, the output voltage remains stable through real-time parameter adjustment.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system uses self-regulating characteristics of the power converter circuitry to maintain frequency stability. The oscillation circuit generates clock signals that automatically adapt to load conditions, and the control circuit uses inherent circuit feedback to maintain stable operation without external intervention, allowing frequency reduction while preserving stability.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10340914B1Power converting device and method
Publication Date: 2019.07.02 ANPEC ELECTRONICS CORPORATION
  • US10340914B1 patent drawing
  • US10340914B1 patent drawing
  • US10340914B1 patent drawing

AI summary

A power converting device and a method thereof are provided. The power converting device includes a filter circuit, a zero-crossing comparison circuit, a counting circuit, a logic circuit, an oscillation circuit, and a control circuit. The zero-crossing comparison circuit outputs a zero-crossing signal when an inductor current is equal to a zero current. The counting circuit counts a time interval between two consecutive time points at which the inductor currents are equal to the zero current in a low power mode. When the logic circuit determines that the time interval is greater than a first time threshold, the control circuit transmits a first oscillating signal to the filter circuit from the oscillation circuit; otherwise, it outputs a second oscillating signal; it outputs a pulse-skipping mode signal when the interval time is less than a second time threshold.