Power Detect Circuit Using Voltage Boosting for Low-Voltage Precision
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Solution Overview
Problem
High precision, low voltage power detect circuits in advanced CMOS processes face challenges in operating effectively under extremely low supply voltages while maintaining high power efficiency and performance, particularly in applications like power-on-reset circuits and voltage monitors for integrated circuits.
Innovation Solution
A power detect circuit design that includes a voltage multiplier to generate a higher supply voltage, a voltage regulator, a bandgap circuit with current mirror and chopping circuitry, and a comparator, along with a voltage monitor to manage switch states and optimize voltage usage, ensuring high precision and power supply rejection ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the power detect circuit operates under extremely low supply voltages to improve power efficiency, then power consumption is reduced, but the circuit precision and reliability deteriorate
Solution Approach 1:
The patent introduces an intermediary voltage boosting circuit that converts the extremely low supply voltage (0.4V-1.0V) into a higher internal voltage. This intermediary mechanism allows the main power detect circuit to operate at elevated voltage levels for high precision while the overall system maintains low power consumption by only boosting voltage when needed for measurement operations.
Solution Approach 2:
The circuit dynamically adjusts its operating voltage based on the detection requirements. During active power detection, the circuit operates at higher voltages to ensure precision; during idle periods, it transitions to low-voltage or power-off states to minimize power consumption. This dynamic voltage scaling resolves the contradiction between continuous high precision operation and low power consumption.
2Loss of energy
If the power detect circuit operates under extremely low supply voltages to improve power efficiency, then power consumption is reduced, but the startup and recovery times increase
Solution Approach 1:
The circuit employs preliminary action by pre-charging capacitors and pre-positioning circuit elements in optimal states before actual power detection begins. When voltage droop occurs or startup is needed, the circuit can quickly transition to operational state because the necessary voltage levels and charge distributions are already prepared, reducing both startup and recovery times while maintaining low steady-state power consumption.
Solution Approach 2:
The voltage boosting and detection operations are performed periodically rather than continuously. The circuit activates the voltage multiplier and performs detection cycles only when power status changes are expected or needed, keeping the main detection circuit in a low-power state otherwise. This periodic operation reduces average power consumption while maintaining fast response when actually detecting power conditions.
3Device complexity
If conventional power detect circuits are used under low supply voltages, then device simplicity is maintained, but power supply rejection ratio deteriorates
Solution Approach 1:
The power detect circuit is segmented into functionally independent modules: a voltage multiplier stage, a regulated voltage generation stage, a bandgap reference stage, and a detection stage. Each module operates independently with optimized voltage levels, allowing the overall circuit to achieve high PSRR while maintaining relatively simple individual components. The segmentation enables low-voltage operation in the detection stage while higher voltages are used only where needed for stable reference generation.
Solution Approach 2:
The circuit changes operating parameters dynamically - specifically, it transforms the supply voltage parameter from extremely low (0.4V-1.0V) to higher levels through the voltage multiplier, and maintains this parameter transformation only during critical detection periods. This parameter change allows the detection circuit to achieve high PSRR when needed while keeping the overall system designed for low-voltage operation, balancing complexity and performance.
Data Source
AI summary
A power detect circuit is disclosed. A power detect circuit includes a voltage multiplier that receives an external supply voltage and generates a second supply voltage that is greater than the former. A voltage regulator is coupled to receive the second supply voltage and outputs a regulated supply voltage. A bandgap circuit is coupled to receive the second supply voltage when a first switch is closed, and the regulated supply voltage when a second switch is closed. The bandgap circuit generates a reference voltage for the voltage regulator, as well as one or more output voltages. A comparator circuit is coupled to receive the one or more output voltages from the bandgap circuit, and may compare these one or more output voltages to the regulated supply voltage.