Power Die Spacer Stack for Thin-Wafer Strength and Warpage Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

High-power semiconductor devices with large-size, thin die configurations are prone to mechanical and thermal stresses, leading to issues like warpage, chipping, and breaking during packaging and assembly due to their fragile nature.

Innovation Solution

The method involves bonding a conductive spacer block to the device die to create a reinforced vertical device stack, which is then processed and handled as a single unit, reducing the risk of damage by increasing the mechanical strength and thickness of the die, thereby preventing warpage and chipping.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If large-size, thin device die are used to meet high power requirements, then power delivery capability is improved, but mechanical strength deteriorates leading to warpage and chipping

Engineering Contradiction:
Improvepower delivery capabilityVSAvoidmechanical strength
Core Design Contradiction:
PowerVSStrength

Solution Approach 1:

The device structure is segmented into multiple functional layers: the thin device die for power delivery, a bonding layer for mechanical support, and a thick conductive spacer block for enhanced mechanical strength. This segmentation allows each layer to perform its specialized function while collectively solving the strength problem of thin die

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention uses composite material structures by bonding the device die to a conductive spacer block through a bonding layer. This composite structure combines the electrical properties of the semiconductor die with the mechanical properties of the conductive spacer block, achieving both high power capability and mechanical strength

Inventive Principle:
Principle #40Composite materials

2Length of moving object

If thin device die are used to reduce size, then device dimensions are improved, but reliability deteriorates due to susceptibility to damage during packaging and assembly

Engineering Contradiction:
Improvedevice thicknessVSAvoidresistance to damage
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

The conductive spacer block is bonded to the device die beforehand to provide mechanical support and cushioning. This pre-reinforcement protects the thin die from damage during subsequent packaging and assembly operations, allowing the die to be thin while maintaining reliability

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The bonding layer acts as an intermediary between the thin device die and the thick conductive spacer block. This intermediate layer provides a transition zone that bonds the two components while accommodating differences in their mechanical properties, ensuring reliable attachment without damaging the thin die

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the successful assembly of large-size, thin device dies into circuit packages without the traditional issues of warpage, chipping, or breaking, while maintaining desirable joint quality between die and conductive materials.

Implementation Method 1

reflowing the solder material layer or sintering the sintering material to bond the device die and the conductive spacer block

Methodology Applied
Scientific EffectSoldering: Soldering

Implementation Method 2

reflowing the solder material layer or sintering the sintering material to bond the device die and the conductive spacer block

Methodology Applied
Scientific EffectSintering: Sintering

Implementation Method 3

activating the coupling mechanism material to bond the conductive spacer blocks to the backside of the selected wafer

Methodology Applied
Scientific EffectBonding: Adhesive

Data Source

PatentUS20240186285A1Pre-stacking mechanical strength enhancement of power device structures
Publication Date: 2024.06.06 SEMICON COMPONENTS IND LLC
  • US20240186285A1 patent drawing
  • US20240186285A1 patent drawing
  • US20240186285A1 patent drawing

AI summary

A method includes placing a coupling mechanism material layer on a backside of a wafer having power devices fabricated on a frontside thereof, and placing conductive spacer blocks on the coupling mechanism material layer on a backside of the selected wafer. The method further includes activating the coupling mechanism material to bond the conductive spacer blocks to the backside of the selected wafer, and singulating the wafer to separate the vertical device stacks, each of the singulated vertical device stacks including a device die bonded to, or fused with, a conductive spacer block.