Vertical Power Die Interconnect Structure for Higher Current Packaging
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Solution Overview
Problem
The increasing demands for high electrical and thermal performance, reliability, and scalability in semiconductor die packaging, particularly in power die packages, are challenging due to the need for efficient bond pad interconnects that can handle higher currents and accommodate chip shrinkage.
Innovation Solution
The development of a power die package that includes a power die with bond pads and a plurality of contact structures, such as bond wires forming closed loops or bumps with a continuous electrically conductive element, which are partially encapsulated in a mold compound, allowing for partial exposure at the outer surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional bond pad interconnect structures are used, then manufacturing is simpler, but current capability and vertical interconnect height are insufficient
Solution Approach 1:
The patent transitions from planar bond pad interconnects to vertical three-dimensional interconnect structures. Bond wires are formed into loops extending vertically from bond pads, and bumps are stacked in multiple layers, creating vertical current paths that increase effective interconnect height and current capability while maintaining a compact footprint.
Solution Approach 2:
The patent implements nested interconnect structures where inner contact structures are positioned within or between outer contact structures. Multiple bumps are stacked vertically, and bond wire loops are nested within mold compound, creating space-efficient multi-level interconnect architectures that maximize current capability within limited package volume.
2Productivity
If chip shrinkage is implemented to increase density, then device integration increases, but bond pad interconnect stress and manufacturing difficulty increase
Solution Approach 1:
The patent changes the geometric parameters of interconnect structures by forming bond wires into loops with specific dimensions and creating bumps with controlled heights and spacing. These parameter optimizations allow the interconnect structures to accommodate chip shrinkage while maintaining adequate stress distribution and manufacturability through standardized formation processes.
3Reliability
If vertical interconnect height is increased to improve current capability, then current handling improves, but manufacturing complexity and time increase
Solution Approach 1:
The patent performs preliminary formation of contact structures by creating bumps and bonding wires to bond pads before the molding process. This preliminary action allows vertical interconnect structures to be established in advance, enabling subsequent mold compound encapsulation to proceed efficiently without requiring complex post-molding interconnect formation steps.
Solution Approach 2:
The patent merges the interconnect formation process with the molding process by encapsulating pre-formed contact structures within the mold compound. This combining of operations allows vertical interconnect structures to achieve increased height and current capability while the molding process simultaneously provides structural support and electrical insulation, reducing total manufacturing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the vertical interconnect height, reduces manufacturing time and cost, and applies less stress to the power die and bond pads, while providing greater flexibility in interconnect height and improved current capability compared to conventional structures.
Implementation Method 1
a bond wire bonded to one of the plurality of bond pads and folded back to the bond pad to form a closed loop
Implementation Method 2
a mold compound partially encapsulating the contact structure, wherein the mold compound comprises an outer surface facing away from the power die
Data Source
Figure 1A~2B
Figure 3A~3E
Figure 4~5B
AI summary
A power die package includes a power die having a plurality of bond pads at an upper surface of the power die. The package further includes a plurality of contact structures. A contact structure comprises (A) a bond wire bonded to one of the plurality of bond pads and folded back to the bond pad to form a closed loop; or (B) at least three bumps laterally spaced from one another and disposed on one or more bond pads, and a continuous longitudinally extended electrically conductive element connected to the at least three bumps in at least three contact positions, wherein the conductive element bends away from the power die between pairs of consecutive contact positions. The package further comprises a mold compound partially encapsulating the contact structure, wherein the mold compound comprises an outer surface facing away from the power die, and wherein the contact structure is partially exposed at the outer surface.