Programmable Power Domain Mapping for Low-Overhead Control
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Solution Overview
Problem
The existing mechanisms for controlling power domains in data processing systems are resource-intensive and power-consuming, as they require complex monitoring and switching processes, leading to significant overhead.
Innovation Solution
The implementation of power control circuitry that maps power status signals to power control signals to manage the power states of multiple power domains within a processing apparatus, using programmable and fixed mapping parameters to simplify the control of power states and reduce resource consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complex monitoring and switching processes are used to control power domains, then power status control capability is improved, but overhead and resource consumption increase
Solution Approach 1:
The power control circuitry autonomously monitors power status signals from multiple power domains and automatically generates appropriate power control signals without requiring external processor intervention. This self-service mechanism eliminates the need for complex software-based monitoring while maintaining reliable power domain control.
Solution Approach 2:
The patent introduces dedicated power control circuitry as an intermediary component between power domains and the processor. This intermediary handles all power status monitoring and control signal generation, simplifying the overall system architecture by centralizing power management functions in specialized hardware rather than using general-purpose processor resources.
2Measurement precision
If dedicated processor core is used to monitor and control power domains, then power domain control accuracy is improved, but resource consumption and power overhead increase
Solution Approach 1:
The patent replaces the mechanical/computational approach of using a processor core for power domain monitoring with an electronic hardware-based power control circuitry. This substitution maintains precise monitoring capabilities through dedicated hardware circuits while eliminating the high resource consumption associated with processor-based power management.
Solution Approach 2:
The patent extracts power domain control functions from the general-purpose processor core and implements them in separate dedicated power control circuitry. This extraction allows the processor to focus on computational tasks while the specialized circuitry handles power management, thereby reducing overall system resource consumption while maintaining control accuracy.
3Adaptability or versatility
If multiple power domains are controlled individually, then power management flexibility is improved, but control overhead increases
Solution Approach 1:
The power control circuitry is designed with universal functionality to handle multiple power domains simultaneously through a unified control mechanism. The circuitry can monitor and control different combinations of power domains based on system requirements, providing flexible power management without requiring separate control paths for each domain, thereby reducing control overhead.
Solution Approach 2:
The patent merges the control of multiple power domains into a single integrated power control circuitry that processes power status signals from all domains and generates coordinated control signals. This consolidation maintains the ability to individually manage each power domain while eliminating redundant control logic and reducing overall control overhead.
Data Source
AI summary
A data processing apparatus includes a plurality of power domains controlled by respective power control signals PCS. Power control circuitry includes mapping circuitry which maps a plurality of power status signals PSS indicative of the power status of respective power domains, and received from those power domains, to form the power control signals which are then supplied power domains. The mapping circuitry may be controlled by mapping parameters stored within a memory mapped array. The mapping parameters may specify that a given power control signal is either sensitive or insensitive to the power status of a particular other power domain within the data processing apparatus-2. The mapping parameters may be fixed or software programmable.