Memory Controller Encoding for Power-Down NAND Data Recovery
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Solution Overview
Problem
Existing NAND-type memories face challenges in improving performance, particularly in ensuring data integrity during power-down conditions, which can lead to data loss and increased capacitor requirements for power loss protection, affecting reliability and design burden.
Innovation Solution
A memory system and method that encodes data during power-down to reduce the amount of data written, enabling error recovery upon power-on, using a memory controller to encode and decode data to ensure data integrity and reduce capacitor capacity needs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is written during power-down to ensure data integrity, then reliability is improved, but capacitor capacity requirements increase
Solution Approach 1:
The patent extracts only the essential data needed for error recovery and writes it to the memory device during power-down, rather than writing all original data. This selective extraction reduces the data volume that must be protected by capacitors, thereby reducing capacitor capacity requirements while maintaining reliability.
Solution Approach 2:
Instead of writing all data during power-down and recovering errors from the written data, the patent inverts the approach by writing only encoded error recovery data during power-down, then using this encoded data along with newly read data to recover errors. This inversion fundamentally changes the data flow and reduces capacitor burden.
2Reliability
If all data is written during power-down, then data integrity is maintained, but the amount of data written increases processing burden
Solution Approach 1:
The patent extracts only the critical error recovery information from the full data set and writes only this extracted portion to the memory device during power-down. This dramatically reduces the amount of data that must be processed and written, lowering the processing burden while preserving the ability to recover errors.
Solution Approach 2:
The patent applies partial action by writing only the necessary portion of data (encoded error recovery data) during power-down rather than all data. This partial writing approach is sufficient to maintain data integrity while significantly reducing processing requirements.
3Quantity of substance
If encoded data is written during power-down, then capacitor capacity is reduced, but decoding complexity increases
Solution Approach 1:
The patent changes the parameter of data representation by encoding data in a compressed format during power-down. This parameter change reduces the data volume that capacitors must protect, and while decoding adds complexity, the encoding scheme is designed to balance this complexity against the significant reduction in capacitor capacity requirements.
Data Source
AI summary
According to one aspect, a memory system is provided. The memory system may include a memory device and a memory controller coupled to the memory device. The memory controller may be configured to in response to a power-down during a first programming operation, encode to-be-written data corresponding to the first programming operation to obtain encoded data, and write the encoded data into the memory device. Wherein the to-be-written data is data to be written into the memory device through the first programming operation. An amount of the encoded data is less than an amount of the to-be-written data. In response to a power-on after the power-down, decode the obtained encoded data and the written data corresponding to the first programming operation to obtain at least a portion of error recovery data corresponding to the written data.