Controller Power-Down Circuit for Battery-Free Data Retention

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Solution Overview

Problem

Implementing power down functionality in complex process control systems in a cost-effective manner is challenging, particularly in retaining process values prior to power failure for reuse upon power up, without the use of batteries.

Innovation Solution

Utilizing a buffer capacitor to store energy for a power down sequence, a power voter to select the capacitor as an energy source during power failure, and non-volatile memory to retain process data, with logic circuitry coordinating data transfer during the power down sequence.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional power down functionality is implemented in complex process control systems, then process data can be retained prior to power failure, but the system complexity and cost increase significantly

Engineering Contradiction:
Improvedata retention capabilityVSAvoidpower down circuitry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the power down functionality from the main controller and implements it as a separate, dedicated circuit module. This extracted module contains only the essential components (buffer capacitor, power voter, non-volatile memory, and logic circuitry) needed for data retention, eliminating the complexity of implementing full power down management within the complex process control system while maintaining the reliability benefit of data retention.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If batteries are used for power down functionality, then data can be retained during power failure, but the cost and device size increase

Engineering Contradiction:
Improvedata retention capabilityVSAvoidcomponent size and cost
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent replaces expensive, large-size batteries with a buffer capacitor that provides short-term energy storage sufficient for completing the power down sequence. The capacitor is charged during normal operation and discharged only when power failure occurs, providing the necessary energy for data transfer to non-volatile memory without the cost and size penalties of battery solutions. This disposable energy storage approach eliminates the need for expensive battery components while achieving the same data retention reliability.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Reliability

If cyclic storage of data in non-volatile memory is implemented, then data can be retained, but process control execution tasks are hindered

Engineering Contradiction:
Improvedata retention capabilityVSAvoidprocess control execution speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the data storage functionality by creating a dedicated power down circuit module that handles all non-volatile memory operations independently from the main process control execution paths. The logic circuitry within this module manages data transfer to and from non-volatile memory without interfering with the main controller's execution tasks. This segmentation allows cyclic storage operations to occur in the background while process control execution continues uninterrupted, maintaining both data retention reliability and execution productivity.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables cost-effective retention of process data using small, readily available components, ensuring unlimited data storage time and uninterrupted process control execution without batteries.

Implementation Method 1

at least one buffer capacitor for buffering sufficient energy to complete a power down sequence

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20250244815A1Power Down Circuitry
Publication Date: 2025.07.31 ABB (SCHWEIZ) AG
  • US20250244815A1 patent drawing
  • US20250244815A1 patent drawing
  • US20250244815A1 patent drawing

AI summary

A power down circuitry for a controller of a process control system includes at least one buffer capacitor for buffering sufficient energy to complete a power down sequence; a power voter configured to select the at least one buffer capacitor as energy source in response to detection of power failure; non-volatile memory for retaining process data following the detection of power failure; and logic circuitry configured to coordinate transfer of the process data to the non-volatile memory during the power down sequence.