Power-Down Circuit With Hold-Up Detection for Stable Shutdown
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Solution Overview
Problem
Existing power down circuits in electronic devices are unstable during power down sequences, leading to incomplete power down sequences and potential data loss due to rapid power signal drops.
Innovation Solution
A power down circuit comprising a holding circuit to store power signal energy, a comparator to compare the stored signal with a threshold, and a buffer circuit to generate a stable power down signal, ensuring a gentler power signal decline and stable operation even after the primary power signal drops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a conventional power down circuit is used, then the circuit responds quickly to power down events, but the power down sequence becomes unstable and may fail to complete due to rapid power signal drops
Solution Approach 1:
The holding circuit stores the power signal in advance before power down occurs. When power down happens, the stored power signal maintains the operating voltage of the comparator and buffer circuit, allowing them to continue functioning and complete the power down sequence reliably.
Solution Approach 2:
The holding circuit acts as an intermediary between the power signal and the comparator/buffer circuit. It decouples the direct dependency, allowing the comparator and buffer circuit to operate with stored energy even when the primary power signal drops, thus mediating the transition smoothly.
2Loss of time
If the power signal drops rapidly during power down, then the power down response is fast, but the comparator cannot complete its comparison operation leading to incomplete power down sequence
Solution Approach 1:
The holding circuit performs preliminary energy storage during normal operation. This stored energy is then released during power down to extend the operating time of the comparator and buffer circuit, ensuring they can complete their operations even though the overall power down time is reduced.
Solution Approach 2:
The holding circuit provides a cushion of stored energy that compensates for the rapid power signal drop. This energy cushion allows the comparator and buffer circuit to continue operating for a predetermined time, preventing operation failure during the power down transition.
3Loss of energy
If the power signal is allowed to drop freely, then energy is conserved, but the power down circuit becomes unstable and cannot maintain operation for the required period
Solution Approach 1:
The holding circuit extracts and stores a portion of the power signal energy during normal operation. During power down, this extracted energy is released to maintain circuit operation, allowing the circuit to function for the required duration without continuously drawing from the primary power source.
Solution Approach 2:
The holding circuit changes the energy availability parameter over time - storing energy when power is abundant and releasing it when power is scarce. This dynamic parameter adjustment allows the circuit to extend its operation duration during power down while maintaining stability.
Data Source
AI summary
A power down circuit and a power down method are provided. The power down circuit includes a holding circuit and a comparator. The holding circuit is coupled to receive a first power signal. The holding circuit is configured to hold the first power signal to generate a second power signal. The comparator is coupled to the holding circuit. The comparator is configured to compare the first power signal and the second power signal to determine whether the first power signal is dropped to be lower than a first threshold voltage.