Power-Down Detection Circuit for Early Isolation Enable

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Solution Overview

Problem

Current SoC implementations face area, power, and leakage costs, as well as delays, in generating isolation signals for voltage domain crossings, which can lead to corrupted signal transmission and functional failures during voltage domain power-down.

Innovation Solution

Incorporating time-to-digital converter circuits in multiple voltage domains to compare voltages and generate an isolation enable signal early in the power-down process, reducing the occurrence of corrupted logic transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If isolation signal is generated externally through I/O pad, then isolation function is achieved, but area cost, power cost, leakage cost, and delay increase

Engineering Contradiction:
Improveisolation functionVSAvoidI/O pad area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The isolation signal generation function is extracted from the external PMU and I/O pad, and relocated to internal voltage detection circuits within the voltage domain. This eliminates the need for external I/O pad while maintaining the isolation function, thereby reducing area cost, power cost, and leakage cost.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Voltage detection circuits are introduced as intermediary components within the voltage domain to detect voltage levels and generate isolation signals internally. These circuits act as mediators between the voltage domain state and the isolation control mechanism, eliminating the need for external I/O pad communication.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If isolation signal is generated externally, then isolation function is achieved, but delay in receiving isolation signal occurs

Engineering Contradiction:
Improveisolation functionVSAvoidisolation signal delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The voltage detection circuits continuously monitor voltage levels within the voltage domain and detect power-down conditions as they occur. By generating isolation signals internally and immediately upon detecting voltage changes, the system eliminates the communication delay associated with external I/O pad signaling, achieving timely isolation before corrupted signals can be transmitted.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If isolation signal is generated only when voltage domain is fully turned off, then simple control is maintained, but corrupted signal transmission occurs

Engineering Contradiction:
Improvecontrol mechanismVSAvoidsignal transmission integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

Voltage detection circuits provide continuous feedback on the voltage domain's power state by monitoring voltage levels. This feedback mechanism enables the system to detect power-down conditions at any stage and generate isolation signals accordingly, rather than relying on simple on/off control. The feedback ensures that isolation is activated precisely when needed, preventing corrupted signal transmission while maintaining controlled operation.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11132010B1Power down detection for non-destructive isolation signal generation
Publication Date: 2021.09.28 APPLE INC
  • US11132010B1 patent drawing
  • US11132010B1 patent drawing
  • US11132010B1 patent drawing

AI summary

A power detection circuit for detecting powering down of a voltage domain in an integrated circuit is disclosed. The power detection circuit is placed in or near the voltage domain in the integrated circuit to provide power detection on the integrated circuit. The power detection circuit detects powering down of the voltage domain to provide an isolation enable signal to another voltage domain that interfaces with the powering down voltage domain. The isolation enable signal may be used by an isolation cell coupled to the non-powering down voltage domain to prevent corrupted logic being received from the powering down voltage domain.