Power Transistor Driver Circuit Using Leakage-Current Ratio Turn-Off
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Solution Overview
Problem
Conventional driver circuits for power transistors face issues with high power consumption and process compatibility, particularly due to increased leakage currents and the need for bias currents to turn off high side power MOS transistors, which affect the inner control circuits and lead to inefficient power management.
Innovation Solution
A driver circuit comprising a converter with a PMOS and an NMOS transistor in series, generating a control signal based on the ratio of leakage currents to manage the power transistor's status, eliminating the need for bias currents and reducing leakage, thereby minimizing power consumption and ensuring full turn-off of the power transistor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a resistor is coupled between the gate of high side power PMOS transistor and the supply node, then the transistor can be turned on, but the voltage difference across the resistor generates current that adversely affects the inner control circuit
Solution Approach 1:
The patent extracts and eliminates the harmful current path by using a specialized transistor structure (first transistor with first and second drains) that separates the gate control function from the current flow path, preventing current from affecting the inner control circuit while maintaining switching reliability
Solution Approach 2:
The patent introduces a converter circuit comprising a first transistor and second transistor coupled in series between the supply node and reference node as an intermediary mechanism. This converter generates a control signal based on the ratio of leakage currents to selectively control the power transistor status, mediating between the supply voltage and the power transistor gate to eliminate harmful current effects
2Reliability
If a bias current is supplied to turn off the high side power PMOS transistor, then the transistor can be fully turned off, but the shut-down power consumption of the driver circuit significantly increases
Solution Approach 1:
The patent employs the natural leakage current characteristics of the first and second transistors to automatically generate the control signal for turning off the power transistor. The converter utilizes the ratio of leakage currents between the first transistor (PMOS) and second transistor (NMOS) to produce the appropriate gate voltage, eliminating the need for external bias current and reducing shut-down power consumption
Solution Approach 2:
The patent changes the operating parameters by using leakage current ratios instead of bias current magnitudes. The converter circuit transforms the leakage current parameters into a control signal that achieves full turn-off of the power transistor without requiring additional power consumption for bias current supply
3Reliability
If bipolar transistor is used to clamp gate-to-source voltage, then the power transistor can be turned off, but the manufacturing process of the bipolar transistor adversely affects the off state and increases leakage current at high temperature
Solution Approach 1:
The patent changes the transistor type from bipolar to CMOS (complementary metal-oxide-semiconductor) for the converter transistors. This parameter change eliminates the manufacturing process conflicts and reduces high-temperature leakage current, as CMOS transistors have superior thermal characteristics and lower leakage compared to bipolar transistors
Solution Approach 2:
The patent uses a composite transistor structure where the first transistor is a PMOS and the second transistor is an NMOS, forming a CMOS inverter configuration. This composite structure leverages the complementary characteristics of PMOS and NMOS transistors to achieve reliable voltage clamping and turn-off control without the drawbacks of bipolar transistors
Data Source
AI summary
A driver circuit for driving a power transistor includes a converter having a first transistor and a second transistor coupled in series between a supply node and a reference node. The converter is configured to receive a first signal and in response thereto generate a second signal for selectively controlling status of the power transistor. The ratio of a first leakage current of the first transistor to a second leakage current of the second transistor is used in the generation of the second signal which is applied to the control terminal of a transistor switch that is selectively actuated to turn off the power transistor.