Power Emulation Calibration for Memory Systems
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Solution Overview
Problem
Existing memory systems face challenges in accurately estimating power consumption, particularly in system-on-chips with high transistor density, due to increased interconnect power consumption and difficulties in aligning peak activity across various modes, leading to inaccuracies in power emulation and estimation.
Innovation Solution
The approach involves calibrating pre-versus post-silicon power figures using a plurality of vectors from scan pattern simulations to determine a calibration factor, which modifies functional power estimation without a full physical design, enabling more accurate power analysis through scan-based power estimation and measurement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If scan-based power estimation is used without full physical design, then power analysis accuracy is improved, but device complexity increases
Solution Approach 1:
The patent uses scan-based power estimation to create a simplified model that copies essential power consumption characteristics without requiring full physical design. The scan chain approach allows virtual replication of power behavior through simulation, avoiding the complexity of complete layout analysis while maintaining measurement accuracy.
Solution Approach 2:
The power analysis is segmented into multiple measurement phases using scan chains. Instead of analyzing the entire physical design at once, the system divides power estimation into discrete scan-based measurements that can be performed incrementally, reducing overall complexity while maintaining comprehensive power analysis coverage.
2Productivity
If functional power estimation is performed without calibration, then analysis speed is improved, but measurement precision deteriorates
Solution Approach 1:
The patent implements calibration using feedback from actual silicon measurements. Measured power values from physical silicon devices are fed back into the estimation model to adjust and refine future predictions. This feedback mechanism progressively improves measurement precision while maintaining the speed benefits of scan-based estimation approaches.
3Measurement precision
If multiple vectors from scan pattern simulations are used for calibration, then power estimation accuracy is improved, but loss of time increases
Solution Approach 1:
The patent performs preliminary calibration using a limited set of scan pattern simulation vectors before final power analysis. By pre-calibrating with representative scan patterns, the system establishes baseline accuracy without requiring exhaustive simulation of all possible vectors, thus reducing time loss while maintaining sufficient precision for practical applications.
Data Source
AI summary
An example method for power emulation and estimation includes estimating a functional power consumption value associated with a memory system by determining: a scan-based power estimation, scan-based power measurement, a calibration factor from correlating the scan-based power estimation to the scan-based power measurement and a correlated functional power using the calibration factor. The calibration factor can be applied to a functional power estimation in order to achieve better accuracy.


