Multi-Voltage Power Fail Latching for Storage Data Integrity
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Solution Overview
Problem
Current memory systems face challenges in ensuring data integrity during power failures, as they often rely on single power supply voltage monitoring, which can lead to incomplete or unsuccessful data transfer to non-volatile memory, compromising data safety.
Innovation Solution
Implementing a system that monitors multiple power supply voltages and latches a power fail condition when either or both are out of range for specified time periods, triggering a power fail operation to transfer data from volatile to non-volatile memory, regardless of voltage recovery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If single power supply voltage monitoring is used, then device complexity is reduced, but data integrity and reliability deteriorate during power failures
Solution Approach 1:
The power supply monitoring system is segmented into multiple independent monitoring channels, each monitoring a different power supply voltage (e.g., VCC and VCCQ). Each channel has its own comparator and timing circuitry, allowing independent detection of power failures in different voltage domains. This segmentation enables comprehensive monitoring without requiring a single complex monitoring system.
Solution Approach 2:
The monitoring approach transitions from single-dimension (one voltage) to multi-dimension (multiple voltages) monitoring. By adding the dimension of monitoring multiple power supply voltages simultaneously, the system achieves more complete detection of power failure conditions that would be missed by single-voltage monitoring, thereby improving data integrity without excessive complexity.
2Speed
If power fail condition is latched immediately upon voltage out-of-range detection, then data transfer to non-volatile memory is triggered faster, but false triggering due to transient voltage fluctuations increases
Solution Approach 1:
The system performs preliminary voltage threshold comparison and time-duration evaluation before latching the power fail condition. The timing circuit monitors how long the voltage remains out of range, and only triggers the power fail latch when the out-of-range condition persists for a predetermined time period. This preliminary action filters out transient fluctuations while maintaining rapid response to genuine power failures.
Solution Approach 2:
The system incorporates feedback through the timing circuit that continuously monitors the voltage condition and adjusts the latching decision based on the duration of the out-of-range state. The feedback mechanism prevents premature latching by requiring the condition to persist for a specific time, thereby reducing false triggering while maintaining fast response to actual power failures.
3Reliability
If voltage recovery is waited before completing power fail operation, then data transfer accuracy improves, but operation completion time increases and may be delayed indefinitely
Solution Approach 1:
The system performs preliminary data transfer to non-volatile memory upon detecting the power fail condition, without waiting for voltage recovery. By taking preliminary action to save critical data immediately, the system ensures data completeness while avoiding indefinite delays. The operation completes based on the power fail detection rather than waiting for uncertain voltage recovery conditions.
Data Source
AI summary
The various embodiments described herein include systems, methods and/or devices used to enable power fail latching based on monitoring multiple power supply voltages in a storage device. In one aspect, the method includes: (1) determining whether a first power supply voltage provided to the storage device is out of range for a first time period, (2) determining whether a second power supply voltage provided to the storage device is out of range for a second time period, and (3) in accordance with a determination that at least one of the first power supply voltage is out of range for the first time period and the second power supply voltage is out of range for the second time period, latching a power fail condition.