Power Failure Detection Circuit Using Active Voltage Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current power failure detection systems, such as the dying gasp function, face challenges in miniaturization and production cost due to the need for additional capacitors to slow down voltage drops, resulting in limited hold time for transmitting power failure alerts, which can lead to failed transmissions.
Innovation Solution
A power failure detection device and method utilizing a voltage reduction circuit with active electronic components to generate an output voltage lower than the input voltage, allowing the detection voltage to keep pace with input voltage variations, thereby enabling timely power failure alerts without additional capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If an additional capacitor or large capacitance capacitor is added to slow down voltage drop, then hold time is increased, but device volume and production cost increase
Solution Approach 1:
The patent changes the voltage detection parameter by using a voltage reduction circuit to transform the high input voltage into a lower detection voltage. This allows the detection circuit to operate at lower voltage levels that can be maintained longer without additional capacitors, thereby extending hold time without increasing device volume
Solution Approach 2:
The voltage reduction circuit acts as an intermediary between the high voltage input and the low voltage detection circuit. It transforms the voltage level to match the detection circuit's requirements, enabling extended hold time through proper voltage level matching rather than through capacitive energy storage
2Duration of action of moving object
If trigger voltage is lowered to extend hold time, then transmission time is increased, but hold time becomes too short for reliable packet transmission
Solution Approach 1:
The patent transforms the voltage parameter through the voltage reduction circuit, creating a detection voltage that is optimally scaled for the detection circuit. This parameter transformation ensures that the voltage remains above the trigger threshold for sufficient duration while maintaining reliable detection, solving the contradiction between extended hold time and transmission reliability
3Speed
If voltage reduction circuit with active components is used, then detection voltage tracks input voltage variation timely, but circuit complexity increases
Solution Approach 1:
The patent replaces passive voltage division (mechanical/resistive system) with an active voltage reduction circuit that uses active electronic components. This substitution enables the detection voltage to dynamically track input voltage variations in real-time, improving voltage tracking speed despite increased circuit complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution increases the hold time for power failure alerts, ensuring timely transmission without the need for additional capacitors, thus enhancing miniaturization and reducing production costs while preventing false alarms.
Implementation Method 1
a voltage reduction circuit, configured to generate an output voltage according to an input voltage, wherein the output voltage is lower than the input voltage
Data Source
AI summary
Disclosed is a power failure detection device and method capable of issuing a power failure alert early. The device includes a voltage reduction circuit, a detection voltage generating circuit, a detection circuit, and a transmitting circuit. The voltage reduction circuit is or includes at least one active electronic component, and generates an output voltage according to an input voltage higher than the output voltage. The detection voltage generating circuit is coupled between the voltage reduction circuit and a low voltage terminal, and generates a detection voltage according to the output voltage that is between the output voltage and the voltage of the low voltage terminal. The detection circuit generates a detection result according to the detection voltage and a trigger voltage. The transmitting circuit sends a power failure alert to a far-end device on condition that the detection result indicates that the detection voltage is lower than the trigger voltage.