Power Failure Disconnector for Memory Backup in Information Processing
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Solution Overview
Problem
In power-failure dealing systems that omit the power-failure FPGA, there is a risk of fatal errors due to access attempts to peripheral devices during backup, as the CPU executing device drivers can generate accesses to peripheral devices without power, leading to system failures.
Innovation Solution
An information processing apparatus with a processor, peripheral device, memory, power-failure detector, and disconnector that disconnects communication between the processor and peripheral device upon power failure detection, allowing the processor to perform a memory backup process independently, thereby preventing access to power-off peripheral devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the power-failure FPGA is omitted to reduce manufacturing cost, then the system can execute memory backup using the CPU, but the CPU may generate access requests to peripheral devices during power failure causing fatal errors
Solution Approach 1:
A disconnector device is introduced as an intermediary component between the CPU and peripheral devices. This disconnector receives a disconnect request from the CPU and physically disconnects the communication path to peripheral devices, preventing access requests from reaching them during power failure while allowing the CPU to continue executing memory backup operations
Solution Approach 2:
The system is segmented into distinct functional components: the CPU for execution control, the disconnector for communication path management, and peripheral devices for I/O operations. This segmentation allows the CPU to operate independently on memory backup while the disconnector separately manages the isolation of peripheral devices, resolving the conflict between cost reduction and reliability
2Device complexity
If the CPU executes device drivers during power failure to perform memory backup, then memory backup can be achieved without power-failure FPGA, but access requests may be generated to peripheral devices without power supply
Solution Approach 1:
The disconnector is configured to receive a disconnect request before the CPU executes device drivers during power failure. This preliminary action disconnects the communication path to peripheral devices in advance, preventing any access requests from reaching them and avoiding fatal errors before they can occur
Solution Approach 2:
The disconnector acts as an intermediary that blocks communication between the CPU and peripheral devices during power failure operations, allowing the CPU to execute memory backup without directly interacting with unpowered peripheral devices, thus eliminating the harmful access effect
Data Source
AI summary
An information processing apparatus includes: a power-failure detector that detects a halt of power supply from a power source; a standby power supply that supplies, when the power supply from the power source is halted, standby power to a processor, a memory, and a storing device; and a disconnector that disconnects communication between the processor and a peripheral device. When the power-failure detector detects the halt of power supply from the power source, the disconnector disconnects the communication between the processor and the peripheral device and the processor carries out a memory backup process that reads data from the memory and stores the read data into the storing device. With this configuration, the memory backup process is surely carried out even in the event of power failure.