Parallel Power FET Gate Balancing for Thermal Stability

Solution Overview

Problem

Existing power supply circuitry for devices with high power consumption faces challenges in maintaining stability across varying operational conditions, such as thermal variations and over-current events, without relying on expensive and bulky heat sinks.

Innovation Solution

The proposed solution involves a power FET circuitry that includes a first and second transistor coupled in parallel, along with driver circuitry and gate balancing circuitry. This configuration biases the gate-to-source voltage of the FETs to increase thermal stability, particularly during electro-thermal stress, by using voltage clamp circuitry to clamp the gate voltage and disable one of the transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If heat sinks are used to dissipate heat from power FETs, then thermal stability is improved, but device size and cost increase

Engineering Contradiction:

Improvethermal stabilityVSAvoiddevice size

Core Design Contradiction:

TemperatureVSWeight of stationary object

Solution Approach 1:

The patent changes the electrical parameters (gate-to-source voltage) of the power FETs to operate in a thermally stable region. By adjusting the gate voltage through the driver circuitry and gate balancing circuitry, the FETs are biased to maintain stability without requiring external heat dissipation structures.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent converts the harmful thermal effects into a beneficial control mechanism. The electro-thermal stress that would normally destabilize the FETs is instead used as a feedback signal - the circuit monitors thermal conditions and adjusts gate voltages accordingly to maintain stability, turning the thermal problem into a self-regulating feature.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

2Temperature

If heat sinks are used to dissipate heat from power FETs, then thermal stability is improved, but manufacturing cost increases

Engineering Contradiction:

Improvethermal stabilityVSAvoidmanufacturing cost

Core Design Contradiction:

TemperatureVSEase of manufacture

Solution Approach 1:

The patent changes the electrical parameters (gate-to-source voltage) of the power FETs to operate in a thermally stable region. By adjusting the gate voltage through the driver circuitry and gate balancing circuitry, the FETs are biased to maintain stability without requiring external heat dissipation structures.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent converts the harmful thermal effects into a beneficial control mechanism. The electro-thermal stress that would normally destabilize the FETs is instead used as a feedback signal - the circuit monitors thermal conditions and adjusts gate voltages accordingly to maintain stability, turning the thermal problem into a self-regulating feature.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

3Temperature

If gate balancing circuitry is added to stabilize FET operation, then thermal stability is improved, but circuit complexity increases

Engineering Contradiction:

Improvethermal stabilityVSAvoidcircuit complexity

Core Design Contradiction:

TemperatureVSDevice complexity

Solution Approach 1:

The patent segments the control function by separating the driver circuitry for each FET, with each driver independently controlled through the gate balancing circuitry. This allows individual adjustment of gate voltages for each transistor, enabling precise thermal stability control while maintaining modular circuit architecture.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The gate balancing circuitry implements a feedback mechanism that monitors the operational state of the parallel FETs and adjusts their gate voltages accordingly. This feedback control ensures that the FETs operate in a thermally stable region by dynamically responding to changes in thermal and electrical conditions.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS20250112629A1Methods and apparatus to stabilize power FET circuitry

Publication Date: 2025.04.03 TEXAS INSTRUMENTS INC

AI summary

An example apparatus includes: a first transistor having a first terminal, a second terminal, and a control terminal; a second transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the second transistor coupled to the first terminal of the first transistor, the second terminal of the second transistor coupled to the second terminal of the first transistor; first driver circuitry having a terminal coupled to the control terminal of the first transistor; second driver circuitry having a terminal coupled to the control terminal of the second transistor; and gate balancing circuitry having a first terminal and a second terminal, the first terminal of the gate balancing circuitry coupled to the control terminal of the first transistor and the terminal of the first driver circuitry, the second terminal of the gate balancing circuitry coupled to the control terminal of the second transistor.