Adaptive Loop Gain in Digital Voltage Regulators at Light Loads

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Solution Overview

Problem

Voltage regulators face instability at light current loads due to increased output impedance, which can lead to loop instability, especially in digital power gate-based designs, where the equivalent transconductance remains constant across load currents, resulting in reduced stability and increased output resistance.

Innovation Solution

An adaptive gain mechanism is implemented in the control loop, where the gain is reduced by classifying the power gate code into ranges and adjusting the gain based on the number of enabled current sources, using a binary shift function to decrease the gain by half with each code range reduction, and initiating pulse frequency modulation at low code values to maintain stability across varying load currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If digital power gate-based voltage regulator is used, then manufacturing precision and control accuracy are improved, but stability at light current loads deteriorates due to increased output impedance

Engineering Contradiction:
Improvecontrol accuracyVSAvoidloop stability
Core Design Contradiction:
Manufacturing precisionVSStability of the object's composition

Solution Approach 1:

The patent applies dynamics by making the control loop gain adjustable rather than fixed. The gain is dynamically modified based on the power gate code value - when the code indicates light load conditions, the gain is reduced to compensate for increased output impedance and prevent loop instability. This dynamic adaptation resolves the contradiction between maintaining high control accuracy and ensuring loop stability across varying load conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the gain parameter of the control loop based on operating conditions. Specifically, the gain is modified as a function of the power gate code - at light loads (low code values), the gain is reduced to counteract the increased output impedance. This parameter change allows the system to maintain stability while preserving the high control accuracy benefits of digital power gate-based regulation.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If constant transconductance is maintained across load currents, then device simplicity is improved, but stability at light loads deteriorates due to increased output resistance

Engineering Contradiction:
Improvedevice simplicityVSAvoidloop stability
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

Rather than complicating the device architecture to maintain constant output resistance, the patent uses a dynamic gain adjustment mechanism. The control loop gain is modified based on the power gate code to compensate for the naturally increasing output resistance at light loads. This dynamic approach maintains device simplicity while resolving the stability issue.

Inventive Principle:
Principle #15Dynamics

3Stability of the object's composition

If gain is reduced at light loads, then loop stability is improved, but control responsiveness may deteriorate

Engineering Contradiction:
Improveloop stabilityVSAvoidcontrol responsiveness
Core Design Contradiction:
Stability of the object's compositionVSSpeed

Solution Approach 1:

The patent applies dynamics by making the gain adjustment conditional and code-dependent. The gain is reduced only when the power gate code indicates light load conditions, while maintaining higher gain at heavier loads where responsiveness is more critical. This conditional dynamic adjustment balances stability improvement with preservation of control responsiveness across different operating regions.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP4191363A1Adaptive gain for compensation in a digital voltage regulator
Publication Date: 2023.06.07 INTEL CORP
  • EP4191363A1 patent drawingFigure 1
  • EP4191363A1 patent drawingFigure 2A
  • EP4191363A1 patent drawingFigure 2B

AI summary

Embodiments herein relate to a feedback loop in a digital voltage regulator for controlling an output voltage. To avoid instability at light current loads, a gain of the loop is reduced as a power gate code indicates a reduced number of branches in set of current sources are enabled. In an example implementation, the code is classified into one range of a number of ranges, and the gain is set based on the one range. The gain can decrease each time the code enters a lower range, as indicated by the code crossing a threshold or predetermined value. For example, the gain can decrease by half each time the code enters a lower range.