Power Gating Control Circuit for Defective Processor Management
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Solution Overview
Problem
Conventional methods for managing defective processors in multiprocessing systems within integrated circuits fail to adequately disconnect unwanted processors from the power supply, leading to increased power dissipation and potential interference with neighboring circuits.
Innovation Solution
A method involving a control circuit that selectively supplies power to circuit blocks using gate circuits, with a second source of power initiated before the first source, ensuring stable control signals are valid before power is supplied to the gate circuits, thereby disabling unwanted processors and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If redundant circuits are activated through fuse blowing to replace faulty components, then IC yield increases and faulty components can be replaced, but power consumption increases because redundant and faulty circuits remain actively clocked and powered
Solution Approach 1:
The patent applies preliminary action by establishing the power gating mechanism and control logic before the actual fault occurrence. The gating circuit is pre-configured to receive control signals from a control logic that monitors circuit status, enabling proactive power management when faults are detected during testing or operation.
Solution Approach 2:
The patent implements dynamics by making the power supply state changeable through the power gating mechanism. The control logic dynamically adjusts the power gating signals based on real-time circuit status, transitioning circuits between powered and unpowered states to optimize power consumption while maintaining functionality.
2Reliability
If faulty circuits are disabled through fuse blowing, then redundant circuits can take their place, but the disabled faulty circuitry continues to be actively clocked and powered causing increased power consumption
Solution Approach 1:
The patent applies the extraction principle by separating the power supply function from the signal distribution function. The power gating mechanism extracts and controls the power supply independently, allowing the control logic to selectively remove power from faulty circuits without affecting their signal routing or clocking infrastructure.
Solution Approach 2:
The patent uses an intermediary approach by introducing a power gating circuit as a mediator between the power supply and the circuit blocks. This intermediary component receives control signals from the control logic and translates them into appropriate power delivery decisions, enabling precise power management without direct manipulation of circuit internals.
3Loss of energy
If power gating is implemented to reduce power consumption of unused redundant circuitry, then power dissipation decreases, but improper power gating during power up conditions may cause interference with neighboring circuits
Solution Approach 1:
The patent applies preliminary action by establishing proper power sequencing and control logic before power-up conditions occur. The control logic is pre-programmed with safe power-up sequences that ensure stable control signals are generated before power gating is activated, preventing electromagnetic interference during critical initialization phases.
Solution Approach 2:
The patent implements feedback by incorporating status monitoring that detects power-up conditions and adjusts control signals accordingly. The control logic receives feedback about the power state and modifies its gating decisions to prevent interference, ensuring stable operation during transitions and power-up sequences.
Data Source
AI summary
Methods and apparatus provide for: selectively supplying a first source of power to a plurality of circuit blocks of a system using a plurality of gate circuits responsive to respective control signals provided by at least one control circuit; and providing a second source of power to operate the control circuit before the first source of power is available to the gate circuits such that the control signals are valid before such availability.