Power Gating Circuit for Floating Node Error Detection
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Solution Overview
Problem
Existing power gating systems in portable electronic devices face errors due to incorrect connections, leading to leakage currents and undetected floating logic values during power-down modes, which are not effectively addressed by current zigzag power gating designs.
Innovation Solution
A power gating system that includes a logic circuit area to block supply voltage and error detection circuits to detect floating output nodes, utilizing test power-down modes with specific voltage levels to identify and correct errors in logic gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If zigzag power gating is implemented to reduce power consumption in power-down mode, then power consumption is reduced, but leakage current is generated due to floating output nodes
Solution Approach 1:
The patent applies preliminary action by introducing a pull-up resistor connected to the output node of the logic gate before power-down mode is activated. This resistor pre-establishes a defined voltage level (logic high or logic low) at the output node, ensuring that when the power gating switch is turned off and the output node would otherwise float, the node maintains a stable voltage level determined by the pull-up resistor. This preliminary configuration prevents leakage current generation while maintaining power savings.
2Loss of energy
If power gating switches are turned off to remove power from logic gates, then power consumption is reduced, but output nodes float and generate leakage current
Solution Approach 1:
The patent introduces a pull-up resistor as an intermediary element between the output node and the power supply or ground. This resistor acts as a mediator that provides a defined electrical path, preventing the output node from floating when the power gating switch is turned off. The intermediary resistor ensures stable voltage levels and prevents leakage current, thereby maintaining reliability while allowing power consumption to be reduced.
3Ease of manufacture
If general digital or analog test is used to detect leakage current, then testing is simple, but leakage current caused by floating nodes is not detected
Solution Approach 1:
The patent implements feedback by using the pull-up resistor to continuously establish a defined voltage level at the output node. This creates a feedback mechanism where the resistor monitors and maintains the output node voltage within valid logic levels. When leakage current attempts to pull the node to an invalid state, the pull-up resistor counteracts this effect and maintains stability, making the leakage detectable through standard testing methods while preserving simple manufacturing processes.
Data Source
AI summary
A power gating system may include a logic circuit area configured to block a supply voltage from being supplied to a plurality of logic gates, when a test power-down mode is enabled; and a plurality of error detection circuits configured to detect logic gates whose output nodes float, among the plurality of logic gates, when the test power-down mode is activated.