Power Gating Switch Current Sensor Parasitic Resistance
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Solution Overview
Problem
Current sensing technologies integrated on a chip face challenges in accurately measuring currents due to sensitivity to parasitic grid resistances and parasitic routing resistances, which can impact the accuracy and complexity of current measurement circuits.
Innovation Solution
The implementation of current-mode current sensing using current sensors that generate sense currents based on load currents passing through power switches, with these sense currents being summed and converted into a digital signal, thereby avoiding sensitivity to parasitic resistances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If voltage-based current sensing is used, then current measurement can be implemented, but the measurement accuracy deteriorates due to sensitivity to parasitic grid resistances and parasitic routing resistances
Solution Approach 1:
The patent replaces voltage-based sensing with current-mode sensing. Instead of measuring voltage drops across sense resistors (voltage domain), the invention directly senses currents using current mirrors and current buffers (current domain). This substitution eliminates the voltage measurement path that is sensitive to parasitic resistances, thereby improving measurement accuracy without being affected by parasitic grid and routing resistances.
Solution Approach 2:
The patent introduces current mirrors as intermediary elements between the power switches and the readout circuit. The current mirrors copy the load currents through isolated paths, creating intermediate current signals that can be summed and measured without directly exposing the measurement path to parasitic resistances. This intermediary mechanism decouples the sensing function from the power distribution network's parasitic elements.
2Measurement precision
If voltage-based current sensing with sense resistors is used, then current can be measured, but the circuit complexity increases due to need to account for parasitic resistances
Solution Approach 1:
The patent replaces complex voltage-based measurement circuits with simpler current-mode circuits. The current mirror architecture naturally provides current copying and summation functions without requiring complex compensation networks for parasitic resistances. Current buffers provide high-input impedance connections that eliminate the need for precise impedance matching and parasitic compensation, simplifying the overall circuit design.
Solution Approach 2:
The patent merges multiple current sensing functions into a single summation node. Instead of requiring separate measurement paths for each power switch (which would increase complexity), the current mirrors direct all sense currents to a common summing point where they are naturally added together. This merging approach simplifies the circuit architecture by reducing the number of independent measurement paths and associated compensation requirements.
Data Source
AI summary
A chip includes a power grid, power switches coupled between the power grid and a circuit, and current sensors configured to generate sense currents based on load currents passing through the power switches. The chip also includes a readout circuit having an input and an output, and signal routing coupling the current sensors to the input of the readout circuit.