Power-Gating Transistor ESD Protection Circuit
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Solution Overview
Problem
Integrated circuits (ICs) are vulnerable to damage from electrostatic discharge (ESD) events, and existing ESD protection methods often require additional transistors, which can consume significant area on the IC die.
Innovation Solution
Implementing power-gating transistors between global and local voltage nodes in ICs, which can also serve as ESD detection and discharge paths, eliminating the need for separate ESD protection transistors and allowing for independent powering of multiple power domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate ESD protection transistors are implemented, then ESD protection capability is improved, but IC die area consumption increases
Solution Approach 1:
The power-gating transistor is designed to perform dual functions: controlling power supply to functional units during normal operation and providing ESD discharge paths during electrostatic discharge events. By integrating these two functions into a single transistor component, the patent eliminates the need for separate ESD protection transistors, thereby reducing IC die area while maintaining comprehensive ESD protection capability across multiple power domains.
2Adaptability or versatility
If multiple power domains are independently powered, then power management flexibility is improved, but circuit complexity increases
Solution Approach 1:
The IC is divided into multiple independent power domains, each with its own power-gating transistor controlled by dedicated control signals. This segmentation allows each power domain to be independently powered on or off based on operational requirements, providing flexible power management. The modular structure of separate control signals for each domain simplifies the overall control architecture despite the multiple domains.
Solution Approach 2:
The power-gating transistors serve dual purposes: normal power management and ESD protection. This multi-functionality reduces the need for additional dedicated ESD protection circuits in each power domain, thereby reducing overall circuit complexity while maintaining independent power control capabilities across multiple domains.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution provides effective ESD protection while conserving area on the IC die by utilizing power-gating transistors for both power management and ESD discharge, reducing the risk of damage from ESD events and optimizing circuit design.
Implementation Method 1
ESD is a sudden increase in electrical current between two points at different electrical potentials from a field of static electricity
Data Source
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AI summary
An integrated circuit (IC) is disclosed. The IC includes a first global voltage node and a second global voltage node. The IC further includes two or more power domains (21, 22) each coupled to the first global voltage node. Each of the two or more power domains (21, 22) includes a functional unit (24) and a local voltage node coupled to the functional unit (24). Each of the plurality of power domains (21, 22) further includes a power-gating transistor (25) coupled between the local voltage node and the second global voltage node, and an ESD (electrostatic discharge) circuit (26) configured to detect an occurrence of an ESD event and further configured to cause activation of the transistor (25) responsive to detecting the ESD event.