Power Gating Granularity Based on Resource Utilization
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Solution Overview
Problem
Existing power gating methods in integrated circuits do not effectively group resources based on utilization levels, leading to excessive circuitry overhead and inefficient power consumption, as resources with low utilization are power gated with similar granularity as those with high utilization.
Innovation Solution
Resources in integrated circuits are grouped into sets based on utilization levels, with different sets being coupled to distinct reference voltage levels via gating circuits, allowing for finer or coarser granularity of power gating depending on utilization, thereby reducing overhead and leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If resources are power gated with uniform granularity regardless of utilization level, then power consumption is reduced, but circuitry overhead increases and design complexity increases
Solution Approach 1:
The patent applies different power gating granularities to different resources based on their utilization levels. High-utilization resources (e.g., multipliers, DSP blocks) are power gated at a fine granularity individually, while low-utilization resources are power gated at a coarse granularity in groups. This local differentiation optimizes the balance between power savings and design overhead by matching the gating strategy to each resource's actual usage pattern.
Solution Approach 2:
The patent segments resources into distinct groups based on utilization levels. Resources are divided into high-utilization categories (multipliers, DSP blocks, processor blocks) and low-utilization categories (standard logic blocks, memory blocks). Each segment is then power gated with an appropriate granularity, avoiding the need to uniformly power gate all resources and thereby reducing overall design complexity.
2Object-generated harmful factors
If fine granularity power gating is applied to all resources, then current leakage is reduced, but design complexity and overhead increase significantly
Solution Approach 1:
The patent implements local quality by applying fine-grained power gating only to resources that require it (high-utilization resources like multipliers and DSP blocks), while applying coarse-grained power gating to low-utilization resources. This selective approach reduces current leakage where it matters most without incurring the full overhead of fine-grained gating across all resources.
Solution Approach 2:
The patent applies partial action by implementing power gating at different levels of granularity rather than uniformly across all resources. High-utilization resources receive the full benefit of fine-grained gating, while low-utilization resources receive coarser gating, achieving sufficient power reduction without excessive design overhead.
3Device complexity
If coarse granularity power gating is applied to all resources, then design complexity is reduced, but power savings and leakage reduction are insufficient
Solution Approach 1:
The patent applies local quality by matching the power gating granularity to the utilization characteristics of each resource type. High-utilization resources receive fine-grained gating for maximum power savings, while low-utilization resources receive coarse-grained gating. This differentiated approach ensures adequate power savings across all resources without uniformly increasing design complexity.
Data Source
AI summary
Power-gating circuit resources of an integrated circuit is described. The circuit resources are associated into sets responsive to utilization levels. The associating includes providing a first set of the sets, a first number of the circuit resources in the first set being associated with a first level of utilization. The associating also includes providing a second set of the sets, a second number of the circuit resources in the second set being associated with a second level of utilization. The first number is less than the second number responsive to the first level of utilization being greater than the second level of utilization. The circuit resources of the first set are commonly coupled to a reference voltage level via a first gating circuit. The circuit resources of the second set are commonly gated to the same or a different reference voltage level via a second gating circuit.