Power-Gating Circuit With Voltage Switching For Leakage Reduction
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Solution Overview
Problem
Mobile devices face challenges in reducing power consumption due to increased leakage current as processes become microscopic and operating temperatures rise, despite existing methods like power gating and clock gating, which are insufficient in managing power consumption effectively.
Innovation Solution
A power-gating circuit is designed with a flip-flop receiving a first power supply voltage and a gated clock signal, along with a switch circuit that operates based on clock enable and power supply voltages, to selectively apply power to flip-flops, reducing leakage current and power consumption by switching between different power modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If power gating is used to shut off current to unused blocks, then power consumption is reduced, but leakage current increases as processes become microscopic and operating temperature increases
Solution Approach 1:
The patent changes the voltage parameter by switching between a first power supply voltage (higher voltage for active operation) and a second power supply voltage (lower voltage for retention mode). This voltage parameter change reduces leakage current while maintaining data retention capability, directly addressing the contradiction between power consumption reduction and leakage current increase in microscopic processes
2Use of energy by moving object
If clock gating is used to stop operating clock signal of non-operating flip-flops, then power consumption is reduced, but it is insufficient in managing power consumption effectively when processes become microscopic
Solution Approach 1:
The patent segments the power supply management into two distinct voltage modes (first power supply voltage and second power supply voltage) that can be independently controlled. This segmentation allows finer-grained power management beyond simple clock gating, enabling effective power consumption management even in microscopic processes where leakage current becomes significant
3Use of energy by moving object
If the SoC is divided into several power blocks and current is shut off to unused blocks, then operating current is reduced, but data retention during voltage switching must be maintained
Solution Approach 1:
The patent prepares the circuit for voltage transition by using a clock enable signal to control the timing of voltage switching. The switch circuit is configured to transition to the second power supply voltage (retention mode) before complete power shutdown, ensuring data is safely latched and retained. This preliminary action prevents data loss while enabling current reduction in microscopic processes
Data Source
AI summary
A power-gating circuit and devices including the same are provided. The power-gating circuit includes a flip-flop configured to receive a first power supply voltage and a gated clock signal to operate and a switch circuit connected between a first power supply voltage source configured to supply the first power supply voltage and a second power supply voltage source configured to supply a second power supply voltage. The switch circuit includes a first switch configured to be connected between the first power supply voltage source and the second power supply voltage source and to operate in response to a clock enable signal and a second switch configured to be connected between the first power supply voltage source and the second power supply voltage source and to operate in response to the first power supply voltage.