Power Grid Conductor Placement in Integrated Circuits
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Solution Overview
Problem
The existing layout of power grid conductors in integrated circuits often results in reduced wiring density due to the use of least common multiples for wire pitches, which can become excessively large, and connectivity issues arise when power grid conductors are made wider to reduce resistive losses, encroaching on minimum conductor spacing requirements.
Innovation Solution
The solution involves offsetting power grid conductors from their conventional positions in integrated circuits to maintain minimum conductor spacing, allowing for higher density routing by modifying the positions of both conductors and vias, enabling the use of wider power grid conductors without violating spacing requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If power grid conductors are made wider to reduce resistive losses, then power transmission efficiency is improved, but wiring density is reduced due to encroachment on minimum conductor spacing
Solution Approach 1:
The patent applies offsetting power grid conductors from their conventional centered positions to non-centered positions in the vertical dimension, allowing wider conductors to be placed without encroaching on minimum spacing requirements for adjacent conductors, thus resolving the contradiction between conductor width and wiring density
2Quantity of substance
If conductor pitch is set to minimum conductor width plus minimum conductor spacing, then wiring density is maximized, but wider power grid conductors cannot be placed without violating spacing requirements
Solution Approach 1:
The patent introduces positional offsetting as an additional degree of freedom, allowing the conductor system to accommodate varying widths while maintaining minimum spacing through vertical position adjustment rather than being constrained to fixed pitch positions
Solution Approach 2:
The patent applies different vertical positions to different conductors based on their individual width requirements, allowing each conductor to be optimally positioned to satisfy both spacing and width requirements, rather than applying a uniform pitch to all conductors
Data Source
AI summary
An integrated circuit 2 is formed with standard-cell power conductors 14 which are overlaid by power grid conductors 20. The power grid conductors are offset in a direction transverse to the longitudinal axis of the power grid conductors relative to their underlying standard-cell power conductor. This has the effect of increasing the conductor spacing possible to one side of the power grid conductor. Accordingly, a wider than minimum width power grid conductor may be provided which blocks only one of its adjacent track positions from being used by a routing conductor 22.