Power Grid Insertion Technique for Integrated Circuits
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Solution Overview
Problem
Standard cell placement and routing tools often waste routing resources by inserting power supplies across entire integrated circuit floorplans, leading to inefficient power, performance, and area (PPA) utilization, and restrictive power grid patterns that reduce design flexibility.
Innovation Solution
Implementing a power grid insertion technique that uses a computing device to identify legal locations for localized power grid structures while maintaining a target pitch, avoiding obstructions and spacing violations, to insert power grid straps and vias efficiently within specific regions of the integrated circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power supplies are routed across the entire floorplan, then power supply coverage is ensured, but routing resources are wasted and PPA deteriorates
Solution Approach 1:
The patent applies local quality by transitioning from a uniform power grid insertion approach to a localized one. The system identifies specific regions requiring power supplies and inserts power grid structures only in those areas, rather than uniformly across the entire floorplan. This is achieved through region identification modules that determine where power supplies are actually needed, thereby ensuring adequate power supply coverage while eliminating routing resource waste in areas that do not require additional power infrastructure.
Solution Approach 2:
The patent segments the power grid insertion process into distinct functional modules: region identification, track location identification, and strap insertion. This segmentation allows the system to handle power grid insertion in a systematic, region-by-region manner rather than as a monolithic process across the entire floorplan, enabling optimized resource allocation and reduced routing waste.
2Reliability
If power supplies are inserted across the entire floorplan, then power supply coverage is ensured, but design flexibility is reduced
Solution Approach 1:
By implementing localized power grid insertion, the system maintains design flexibility while ensuring power supply coverage. Different regions of the integrated circuit can have different power supply configurations tailored to their specific requirements, rather than being constrained by a uniform grid pattern imposed across the entire floorplan. This allows designers to adapt the power grid structure to match the actual functional requirements of different circuit regions.
3Reliability
If power grid structures are inserted densely, then power supply integrity is improved, but routing resources are consumed
Solution Approach 1:
The patent applies partial action by inserting power grid structures only in regions where they are actually needed, rather than uniformly across the entire floorplan. The system identifies specific regions requiring power supplies and inserts appropriate数量的 power grid structures in those areas, avoiding excessive insertion in regions that do not require additional power infrastructure, thereby maintaining power supply integrity while reducing routing resource consumption.
Data Source
AI summary
Various implementations described herein are directed to an apparatus. The apparatus may include a region identifier module that receives user defined parameters for modifying a power grid layout and identifies a region of the power grid layout for strap insertion based on the user defined parameters. The apparatus may include a track identifier module that identifies track locations in the region of the power grid layout for strap insertion. The apparatus may include a strap placement module that inserts at least one strap in the region of the power grid layout based on pre-determined rules for strap insertion.